Trench Phase Change Memory Diode Uniformity
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Solution Overview
Problem
The existing phase change random access memory (PCRAM) devices face challenges in scaling down diode size and achieving uniform current driving capacity due to fabrication errors and increased word line resistance, which limits device integration and operational reliability.
Innovation Solution
A phase change memory apparatus is developed with a SEG layer formed longer than it is wide, patterned in a trench shape to ensure uniform diode size and current flow, and a bottom electrode contact is formed to enhance current driving capacity and reduce word line resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If hole type patterns are used for diode formation in PCRAM devices, then the device can be manufactured with conventional processes, but the diode size cannot be uniformly controlled and fabrication errors increase as device shrinkage progresses
Solution Approach 1:
The patent applies asymmetry by changing the diode structure from a planar hole-type pattern to a three-dimensional vertical structure with a trench and stacked electrodes. This asymmetric vertical configuration allows precise control of diode dimensions through trench depth and electrode placement rather than relying on planar pattern dimensions, thereby achieving uniform diode size even as device scaling progresses.
Solution Approach 2:
The patent transitions from two-dimensional planar diode formation to three-dimensional vertical diode structure. By extending the diode formation into the vertical dimension with a trench and stacked electrode configuration, the invention achieves better size control and uniformity, as the critical dimensions are defined by vertical etching depth and layer thickness rather than lateral pattern dimensions.
2Reliability
If metal word line contacts are formed for every unit cell string to reduce word line resistance, then word line resistance decreases, but chip size increases
Solution Approach 1:
The patent merges multiple word line contacts into a shared common electrode structure. Instead of providing individual metal contacts for each unit cell string, the invention uses a single common electrode that serves multiple cell strings, thereby reducing the total number of contacts required and decreasing chip area while maintaining acceptable word line resistance through the low-resistance SEG layer pathways.
Solution Approach 2:
The common electrode structure performs multiple functions: it serves as the cathode for multiple diodes in different unit cell strings simultaneously, eliminates the need for individual word line contacts for each string, and provides a low-resistance current path through the SEG layer. This multi-functional design reduces chip complexity and area.
3Productivity
If the number of unit cells in a cell string is increased to improve integration, then device integration improves, but operation uniformity deteriorates due to varying current driving capacity
Solution Approach 1:
The patent applies local quality by ensuring that each unit cell string has access to a dedicated low-resistance SEG layer pathway from the common electrode to the active region. This localized optimization of current paths through the SEG layer ensures uniform current driving capacity across all unit cells in the string, maintaining operation uniformity even as the number of cells per string increases.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for the formation of diodes with uniform size and current capacity, reducing the number of word line contacts needed, thereby improving device integration and operational reliability while minimizing chip size and word line resistance.
Implementation Method 1
forming a selective epitaxial growth (SEG) layer within the hole type pattern of the insulating layer through a SEG process
Data Source
AI summary
A phase change memory apparatus is provided that includes a first electrode that is longer than it is wide, the first electrode having a trench formed on an active region of a semiconductor substrate, a second electrode formed in a bottom portion of the trench, and a bottom electrode contact formed on the second electrode.