Trench Pixel Capacitor Structure for Noise and Miniaturization
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Solution Overview
Problem
Laminate-type image capture devices face challenges in reducing noise and miniaturization due to limitations in the layout of electrical connections and parasitic capacitance, which affect the quality and size of the imaging device.
Innovation Solution
The imaging device incorporates a first capacitive element with trench portions and multiple electrical contact points, allowing for increased freedom in wire layout, reduced parasitic capacitance, and enhanced capacitance value, while minimizing pixel area and contact resistance variations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If the photoelectric conversion layer is arranged on an insulating layer covering the semiconductor substrate, then the device structure is simplified and manufacturing is easier, but parasitic capacitance increases and noise reduction becomes difficult
Solution Approach 1:
The patent transitions from a planar capacitive element layout to a three-dimensional trench structure. The trench portions extend vertically into the insulating layer, increasing the electrode surface area and capacitance value while reducing the horizontal footprint. This dimensional change allows the capacitive element to achieve higher capacitance without increasing pixel area, thereby reducing parasitic capacitance effects and improving noise performance while maintaining manufacturing feasibility.
Solution Approach 2:
The trench portions are formed within the insulating layer, nesting the capacitive element structure inside the existing pixel architecture. The first and second electrodes are positioned within the trench, utilizing the insulating layer material as part of the capacitive structure. This nesting approach integrates the capacitive element into the existing device structure without requiring additional processing steps or increasing overall device complexity.
2Area of moving object
If the pixel area is reduced for miniaturization, then the imaging device size decreases, but the layout freedom for electrical connections is limited and contact resistance variations increase
Solution Approach 1:
By forming trench portions that extend vertically into the insulating layer, the patent increases the electrode surface area and capacitance value without increasing the horizontal pixel footprint. This three-dimensional structure provides multiple contact points (first and second electrical contact points) within the trench, improving electrical connection reliability and reducing contact resistance variations while maintaining miniaturized pixel dimensions.
Solution Approach 2:
The capacitive element is divided into multiple segments through the trench portions, with the first electrode and second electrode forming separate conductive regions. This segmentation creates multiple electrical contact points that can be independently optimized, reducing the impact of any single contact resistance variation and improving overall connection reliability within the miniaturized pixel structure.
3Object-affected harmful factors
If the capacitance value of the capacitive element is increased to reduce noise, then the electrode surface area must increase, but this increases the pixel area and prevents miniaturization
Solution Approach 1:
The patent resolves this contradiction by extending the electrodes vertically into the insulating layer through trench portions. This three-dimensional configuration increases the electrode surface area and thus the capacitance value without increasing the horizontal pixel footprint. The trench structure provides additional capacitance through the increased surface area of the electrodes in contact with the insulating layer, enabling noise reduction while maintaining miniaturized pixel dimensions.
Solution Approach 2:
The capacitive element is nested within the pixel structure by forming trench portions that extend into the insulating layer. This nesting approach increases the capacitance value by utilizing the vertical space within the existing pixel architecture, rather than requiring additional horizontal area. The trench portions are integrated into the pixel structure, providing increased capacitance for noise reduction without expanding the overall pixel area.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration reduces noise, miniaturizes the imaging device, and stabilizes image quality by minimizing contact resistance variations and parasitic capacitance effects.
Implementation Method 1
a first capacitive element including a first electrode provided above the semiconductor substrate, a second electrode provided above the semiconductor substrate, and a dielectric layer located between the first electrode and the second electrode
Data Source
AI summary
An imaging device includes a semiconductor substrate and pixels. Each of the pixels includes a first capacitive element including a first electrode provided above the semiconductor substrate, a second electrode provided above the semiconductor substrate, and a dielectric layer located between the first electrode and the second electrode. At least one selected from the group consisting of the first electrode and the second electrode has a first electrical contact point electrically connected to a first electrical element and a second electrical contact point electrically connected to a second electrical element different from the first electrical element. The first capacitive element includes at least one trench portion having a trench shape.