Integrated Trench Power Inductor for PCB Space Reduction

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Solution Overview

Problem

Trench power devices require external inductors that occupy large space on printed circuit boards, increasing costs and hindering miniaturization and integration of electronic devices due to the need for separate inductance components.

Innovation Solution

A manufacturing method for integrating an inductor within a trench power device, involving steps such as forming a cell structure, defining contact holes, and forming a circuit link layer, which includes growing an epitaxial layer, depositing silicon dioxide as a hard mask, and etching trenches to create a trench structure that incorporates an inductor without increasing the number of masks or chip area.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If external inductors are used with trench power devices, then wave filtering and switching stability are improved, but the occupied space on printed circuit boards increases and integration is hindered

Engineering Contradiction:
Improveswitching stabilityVSAvoidoccupied space on printed circuit board
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent merges the inductor and power device into a single integrated structure. The inductor is formed within the same semiconductor substrate as the power device, with the inductor winding pattern created using standard photolithography and metallization processes. This integration eliminates the need for separate external inductors and their connecting wires, directly resolving the space occupation problem while maintaining the necessary filtering and stability functions.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The integrated structure serves multiple functions: the power device provides switching functionality while the integrated inductor provides energy storage and wave filtering. The same semiconductor substrate and metallization layers that form the power device interconnections are also used to create the inductor winding pattern, allowing one structure to perform multiple electrical functions simultaneously.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Reliability

If external inductors are welded onto printed circuit boards, then inductance function is achieved, but manufacturing complexity and costs increase

Engineering Contradiction:
Improveinductance functionVSAvoidmanufacturing complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The inductor manufacturing process is merged with the power device fabrication process. Both structures are formed simultaneously on the same semiconductor substrate using the same sequence of photolithography, etching, and metallization steps. This eliminates separate inductor assembly, welding, and wire bonding operations, directly reducing manufacturing complexity while ensuring consistent electrical performance.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent replaces mechanical welding and wire bonding processes with integrated semiconductor fabrication processes. The inductor is formed using standard semiconductor manufacturing techniques (photolithography, sputtering, etching) rather than mechanical assembly methods, eliminating the complexity of aligning, welding, and connecting separate components.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

3Adaptability or versatility

If separate inductance components are used, then circuit functionality is achieved, but miniaturization of electronic devices is hindered

Engineering Contradiction:
Improvecircuit functionalityVSAvoiddevice size
Core Design Contradiction:
Adaptability or versatilityVSVolume of moving object

Solution Approach 1:

The inductor and power device are combined into a single monolithic integrated structure on the same semiconductor chip. The inductor winding pattern is created using the same metallization layers that form the power device interconnections, eliminating the need for separate inductor components and their associated mounting space, thereby enabling device miniaturization while maintaining full circuit functionality.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The inductor is formed in the planar dimension of the semiconductor substrate using spiral or meander winding patterns, rather than requiring a separate three-dimensional component. This two-dimensional integration approach allows the inductor to occupy the same chip area as the power device without requiring additional vertical stacking or external mounting, directly enabling miniaturization.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach allows for the formation of an inductance component within the trench power device without expanding the chip area, reducing the need for external inductors and thus decreasing the occupied space on printed circuit boards, leading to cost savings and miniaturization of electronic equipment.

Implementation Method 1

growing an epitaxial layer on a silicon substrate by chemical vapor deposition

Methodology Applied
Scientific EffectChemical vapor deposition: Chemical Vapour Deposition

Implementation Method 2

depositing a silicon dioxide thin film on the epitaxial layer as a hard mask for trench etching

Methodology Applied
Scientific EffectPhysical vapor deposition: Physical Vapour Deposition

Implementation Method 3

spin coating a photoresist on the hard mask

Methodology Applied
Scientific EffectSpin coating: Spin Coating

Implementation Method 4

transferring the circuit pattern onto the silicon substrate by dry etching

Methodology Applied
Scientific EffectPlasma etching: Plasma

Implementation Method 5

growing a sacrificial oxide layer on side walls of the trenches in a thermal oxidation process

Methodology Applied
Scientific EffectThermal oxidation: Oxidation

Implementation Method 6

growing a gate oxide layer in a thermal oxidation process using a high-temperature furnace tube

Methodology Applied
Scientific EffectThermal oxidation: Oxidation

Implementation Method 7

depositing a polycrystalline silicon layer on surfaces of the trenches and the silicon substrate by low-pressure chemical vapor deposition

Methodology Applied
Scientific EffectChemical vapor deposition: Chemical Vapour Deposition

Implementation Method 8

growing a silicon dioxide/nitride silicon/silicon dioxide composite thin film on the surface of the silicon substrate in a thermal oxidation process using a high-temperature furnace tube

Methodology Applied
Scientific EffectThermal oxidation: Oxidation

Implementation Method 9

depositing an intrinsic polycrystalline silicon layer on a surface of the silicon dioxide/nitride silicon/silicon dioxide composite thin film by low-pressure chemical vapor deposition

Methodology Applied
Scientific EffectChemical vapor deposition: Chemical Vapour Deposition

Implementation Method 10

forming a transistor body region by ion implantation

Methodology Applied
Scientific EffectIon implantation: Ion Implantation

Data Source

PatentUS20240222420A1Trench power device integrated with inductor and manufacturing method therefor
Publication Date: 2024.07.04 CHONGQING ALPHA AND OMEGA SEMICONDUCTOR LIMITED
  • US20240222420A1 patent drawing
  • US20240222420A1 patent drawing
  • US20240222420A1 patent drawing

AI summary

The present disclosure relates to a technical filed of power devices and manufacturing of semiconductors, and in particular to a manufacturing method for trench power device integrated with inductor and a trench power device integrated with inductor manufactured thereby, and the manufacturing method includes: forming a cell structure and an integrated inductor, defining contact holes; C, forming a circuit link layer, and forming a passivation layer.