Trench Power Device With Integrated Source Capacitor for PCB Area Reduction
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Solution Overview
Problem
Current printed circuit boards require a large area for connecting external capacitors, which increases costs and hinders the miniaturization and integration of electronic devices in power management applications.
Innovation Solution
A manufacturing method that integrates a trench type power device and a source capacitor, involving steps such as preparing a cellular structure, forming trench patterns, depositing and doping materials, and accessing an electro-static discharge diode and capacitor into the trench type power device, thereby reducing the need for external capacitors and minimizing board area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If external capacitors are connected to power devices through printed circuit board wires, then filtering and rectifying functions are achieved, but the board area increases and costs increase
Solution Approach 1:
The patent combines the capacitor and power device into a single integrated structure where the capacitor is formed within the same semiconductor substrate as the power device. This merging eliminates the need for separate external capacitors and their connecting wires, thereby reducing board area while maintaining the filtering and rectifying functions.
Solution Approach 2:
The capacitor is nested within the power device structure, with the capacitor's electrodes and dielectric layer integrated into the same substrate. This nesting approach allows the capacitor to occupy space within the power device's footprint rather than requiring additional external board space.
2Reliability
If external capacitors are welded on printed circuit board, then filtering and rectifying functions are achieved, but manufacturing costs increase
Solution Approach 1:
By merging the capacitor and power device into a single integrated semiconductor structure, the patent eliminates separate welding and mounting operations for external capacitors. This reduces manufacturing steps, labor costs, and assembly complexity while maintaining the required filtering and rectifying functions.
Solution Approach 2:
The integrated structure serves multiple functions simultaneously - the same substrate houses both the power device and the capacitor, eliminating the need for separate components and their associated mounting, wiring, and assembly processes, thereby reducing overall manufacturing costs.
3Reliability
If external capacitors are used with large connection area, then filtering and rectifying functions are achieved, but miniaturization of electronic devices is hindered
Solution Approach 1:
The patent merges the capacitor and power device into a single integrated unit, eliminating the need for separate external capacitor components and their large connection areas. This integration enables miniaturization by consolidating multiple functions into a compact semiconductor structure.
Solution Approach 2:
The capacitor is formed in the vertical dimension within the semiconductor substrate using stacked electrode and dielectric layers, rather than requiring extensive horizontal board space. This dimensional transition from 2D board mounting to 3D integrated structure enables device miniaturization while maintaining capacitance function.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method allows for a cost-controlled device with reduced board area, achieving miniaturization and cost reduction by integrating the capacitor within the trench type power device, thus overcoming the limitations of prior art.
Implementation Method 1
step S1, performing chemical vapor deposition on an upper surface of a silicon substrate with epitaxial layers
Implementation Method 2
performing chemical vapor deposition on an upper surface of a silicon substrate with epitaxial layers
Implementation Method 3
a preparation method of the mask includes a low-temperature chemical vapor deposition method
Implementation Method 4
a preparation method of the mask includes a high-temperature furnace tube thermal oxidation method
Implementation Method 5
defining trench patterns through exposure of a photoetching machine
Implementation Method 6
transferring the circuit pattern onto the silicon substrate through dry etching
Implementation Method 7
removing the photoresist and the mask through wet drying
Implementation Method 8
growing a sacrificial oxide layer on a sidewall of each of the lower polar plate trench, the interconnection gate trench, and the cellular gate trench through a high-temperature furnace tube thermal oxidation method
Implementation Method 9
doping the pentavalent elements or the trivalent elements, where when the pentavalent elements are doped, the pentavalent elements are doped in a deposition process, when the trivalent elements are doped, the trivalent elements are doped through ion implantation
Implementation Method 10
removing a part of the polysilicon above an upper opening of each of the lower polar plate trench, the interconnection gate trench, and the cellular gate trench through chemical mechanical polishing
Implementation Method 11
growing a silicon dioxide-silicon nitride-silicon dioxide composite thin film on an upper surface of the gate oxide layer or the polysilicon through the high-temperature furnace tube thermal oxidation method
Implementation Method 12
depositing one layer of polysilicon on the lower polar plate trench, the interconnection gate trench, the cellular gate trench, and the silicon substrate through low-pressure chemical vapor deposition
Implementation Method 13
activating the second impurity doped in the transistor body region through high-temperature thermal annealing
Data Source
AI summary
A device integrating a trench type power device and a source capacitor and a manufacturing method of the device integrating the trench type power device and the source capacitor are provided, which relate to a technical field of manufacturing power semicondutor devices. The manufacturing method includes steps of preparing a cellular structure, preparing contact holes and tungsten bolts, accessing an electro-static discharge (ESD) diode and an integrated capacitor into the trench type power device, and depositing a passivation layer, etching a pad region, and performing wire bonding, which integrates the trench type power device and the source capacitor. Since no other masks are additionally added, a cost of the trench type power device and the manufacturing method thereof is controllable, and the device integrating the trench type power device and the source capacitor reduces use of external capacitors, thereby reducing an occupied area of a printed circuit board.