Trench Profile Control via Dielectric Capping Layers
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Solution Overview
Problem
Existing methods for fabricating semiconductor devices, particularly in scaling down MOSFETs, face challenges in forming trenches for interconnection structures, leading to issues with via resistance and polymer buildup that affect device performance.
Innovation Solution
A method involving the formation of dielectric capping layers along the sidewalls of trenches to protect the trench profile during subsequent etching processes, using different materials for etching selectivity and reducing polymer formation, and filling sub-trenches to smooth out corners and maintain trench integrity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional etching methods are used to form trenches, then the etching process can be completed, but polymer buildup occurs on trench sidewalls affecting profile precision
Solution Approach 1:
A capping layer is formed on the trench sidewalls before the etching process to prevent polymer buildup during etching. This preliminary protective action ensures that when etching occurs, the capping layer already in place prevents polymer deposition on the sidewalls, maintaining trench profile precision without requiring post-etch cleaning.
Solution Approach 2:
The etching process naturally produces polymer byproducts that would contaminate the trench sidewalls. The invention converts this harmful effect by having the capping layer selectively remove or prevent polymer deposition on sidewalls while allowing the etching to proceed, thus transforming the polymer generation issue into a controlled process where the capping layer's differential etching rate actually protects the trench profile.
2Productivity
If trench width is reduced for scaling, then device density increases, but via resistance increases and performance deteriorates
Solution Approach 1:
The capping layer is formed on trench sidewalls before etching to maintain precise sidewall profiles. This preliminary protection ensures that even when trenches are made narrower for scaling, the sidewalls remain smooth and well-defined, preventing defects that would increase via resistance and maintaining electrical performance despite reduced dimensions.
3Adaptability or versatility
If multiple trenches are formed sequentially, then complex interconnect patterns are achieved, but existing trenches lose profile definition
Solution Approach 1:
After forming each trench, a capping layer is deposited on its sidewalls before subsequent etching operations. This preliminary capping protects the existing trench sidewalls from damage during the formation of additional trenches, maintaining their profile definition even as complex multi-layer interconnect patterns are built up sequentially.
Solution Approach 2:
The capping layer acts as an intermediary protective layer between existing trenches and the etching process used to form new trenches. This intermediate layer prevents direct contact between the etching chemistry and the sidewalls of existing trenches, thereby preserving their shape while allowing new trenches to be formed with precise patterns.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach preserves the sidewall profile and width of existing trenches, improves the profile of new trenches, and reduces polymer buildup, enhancing the reliability and performance of interconnects in semiconductor devices.
Implementation Method 1
forming a first dielectric capping layer along sidewalls of the first trench and the first dielectric capping layer has a different etch rate than the material layer
Implementation Method 2
using different materials for etching selectivity and reducing polymer formation
Implementation Method 3
filling sub-trenches to smooth out corners and maintain trench integrity
Data Source
AI summary
Methods are disclosed herein that improve contours of trenches formed when fabricating vias and conductive lines of a multi-layer interconnect (MLI) structure. An exemplary device that can result from such methods includes a via of an MLI structure and a conductive line of the MLI structure disposed over the via. A first dielectric liner layer is disposed along sidewalls of the via and sidewalls of the conductive line. A thickness of the first dielectric liner layer is substantially the same along the sidewalls of the via. A thickness of the first dielectric liner layer increases along the sidewalls of the conductive line, such that the first dielectric liner layer has a tiger-tooth shape at each bottom corner of the conductive line. A second dielectric liner layer is disposed along the first dielectric liner layer that is disposed along the sidewalls of the via.