Semiconductor Trench Sealing Plug for Stress Reduction
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Trench structures in semiconductor devices face issues such as high stress, defect formation, and contamination due to fill materials, leading to parasitic current leakage and compromised device performance.
Innovation Solution
A single crystal epitaxial semiconductor layer is formed along the upper sidewall surfaces of trenches to seal or partially seal core regions, reducing stress and contamination, and eliminating parasitic MOS devices by using selective epitaxial growth techniques that leave exposed major surfaces of dielectric layers absent semiconductor material.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If fill materials are used to fill trench structures, then trench structures can be formed, but high stress and defect formation occur leading to device failure
Solution Approach 1:
The patent removes the harmful fill materials (dielectrics, polysilicon) from the trench core region while maintaining the beneficial trench structure. The trench is sealed at the top with a semiconductor plug that grows from the sidewalls, leaving the core region empty or partially filled, thereby eliminating the source of stress and defects while preserving the isolation and electrical properties.
Solution Approach 2:
The patent applies different material properties to different regions of the trench structure. The top of the trench is sealed with a semiconductor plug grown from the sidewalls, while the core region remains empty or has minimal filling. This localized approach provides sealing where needed while avoiding stress-inducing materials in the core region.
2Reliability
If silicon or polysilicon/oxide fill materials are used, then trench structures can be formed, but parasitic MOS devices are created that impair device performance
Solution Approach 1:
The patent extracts and removes the polysilicon/oxide fill materials from the trench core region. By leaving the core region empty or filling it with non-parasitic materials, the invention eliminates the formation of unwanted parasitic MOS devices while maintaining the necessary electrical isolation and structural integrity.
3Reliability
If thermally generated carriers are present in semiconductor fill materials, then trench structures can be formed, but undesirable electric fields are created that compromise breakdown voltage
Solution Approach 1:
The patent removes semiconductor fill materials from the trench core region, eliminating the source of thermally generated carriers. The trench is sealed at the top with a semiconductor plug but the core region is left empty or minimally filled, preventing the creation of undesirable electric fields that would compromise breakdown voltage.
4Reliability
If conventional trench formation methods are used, then trenches can be formed, but contaminants are incorporated in core regions during processing
Solution Approach 1:
The patent extracts and eliminates the problem of contamination by removing the practice of filling trench core regions with materials during processing. The trench is sealed at the top with a semiconductor plug grown from the sidewalls, but the core region is left empty or minimally filled, preventing contaminant incorporation while maintaining structural integrity.
5Reliability
If selective epitaxial growth is used to seal trench core regions, then stress and contamination are reduced, but processing complexity increases
Solution Approach 1:
The selective epitaxial growth process is self-limiting and self-organizing. The semiconductor plug grows automatically from the exposed sidewall surfaces of the trench, sealing the core region without requiring additional masking or patterning steps. The growth stops when the plug meets the opposing sidewall or reaches a predetermined thickness, eliminating the need for complex process control.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the reliability and quality of semiconductor devices by minimizing defects and stress, improving breakdown voltage, and simplifying processing while reducing the incorporation of contaminants.
Implementation Method 1
A single crystal epitaxial semiconductor layer or substantially homogeneous semiconductor layer or plug is formed along upper sidewall surfaces of a trench
Data Source
AI summary
In one embodiment, a semiconductor device is formed having a trench structure. The trench structure includes a single crystalline semiconductor plug formed along exposed upper surfaces of the trench. In one embodiment, the single crystalline semiconductor plug seals the trench to form a sealed core.