Trench Power Semiconductor Structure for Dynamic Avalanche Suppression
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Solution Overview
Problem
Power semiconductor devices face challenges in handling overload situations, leading to dynamic avalanches and latch-up during switching from conduction to blocking states, particularly due to increased field strengths and filamentation of load current, which can result in device destruction.
Innovation Solution
The integration of semiconductor structures with a serial connection of regions of specific conductivity types, including a first region coupled to the drift region, a second region of a different conductivity type, and a third region coupled to the load terminal via ohmic resistors and Zener diodes, which inject electrons to limit electric field strength and reduce the risk of dynamic avalanches during overload situations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If the power semiconductor device is designed for high current conduction capability, then the load current handling is improved, but the risk of dynamic avalanches and latch-up increases during overload situations
Solution Approach 1:
The semiconductor body is divided into multiple mesas laterally confined by trenches, with different mesa types (first type for current conduction, second type with semiconductor structures for field control). This segmentation allows independent optimization of current handling and field strength control in different regions.
Solution Approach 2:
Semiconductor structures (pn-junctions or diodes) are introduced as intermediary elements in the second type mesas. These structures detect high field strengths and trigger electron injection through the drift region to compensate hole charges and limit field strength, preventing dynamic avalanches.
2Power
If the device operates in forward conducting state with high current, then the power handling is improved, but field strengths increase leading to filamentation of load current during switching to blocking state
Solution Approach 1:
The semiconductor structures provide feedback control by detecting high field strengths during the transition from conducting to blocking state. When high field conditions are detected, the structures trigger electron injection to compensate hole charges and actively limit field strength, preventing current filamentation.
Solution Approach 2:
The semiconductor structures are pre-configured in the second type mesas to activate before dynamic avalanches occur. During overload situations, they proactively inject electrons to compensate hole charges in the space charge zone, preventing the development of high field strengths and current filamentation.
3Reliability
If trenches are introduced to confine mesas, then the device structure is improved for better field control, but the device complexity increases
Solution Approach 1:
The trenches serve multiple functions: they laterally confine the mesas to define active regions, provide physical separation between different mesa types, and support the semiconductor structures for field control. This multi-functionality reduces the need for additional separate components.
Solution Approach 2:
The patent combines current conduction function (first type mesas) and field control function (second type mesas with semiconductor structures) into a single integrated device structure. Both functions are implemented within the same semiconductor body using the same trench confinement approach.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively limits field strengths and reduces the risk of dynamic avalanches, ensuring stable operation during overload conditions and preventing device destruction by compensating hole charges in the space charge zone, thereby enhancing the robustness of power semiconductor devices.
Implementation Method 1
a third region of the first conductivity type coupled to the first load terminal by at least one of a first ohmic resistor and a Zener diode
Data Source
AI summary
A power semiconductor device includes: a semiconductor body that conducts a load current between first and second load terminals at opposite first and second sides; a drift region of a first conductivity type; trenches extending from the first side towards the second side and each including a trench electrode; mesas laterally confined by the trenches and each including first and second type mesas; and semiconductor structures each including a serial connection of a first region of the first conductivity type coupled to or formed by the drift region, a second region of a second conductivity type and a third region of the first conductivity type coupled to the first load terminal by at least one of a first ohmic resistor and a Zener diode. Each first type mesa is electrically connected to the first load terminal and devoid of the semiconductor structures which are arranged in the second type mesas.