Trench Semiconductor Device Floating Body Effect
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Solution Overview
Problem
As semiconductor devices are scaled down to the nano-level, the floating body effect occurs due to charge accumulation in the channel region, leading to reduced device capacity and performance, which existing technologies have not effectively addressed.
Innovation Solution
A trench-type semiconductor device structure is developed with a doped channel layer to transfer accumulated charge to the substrate, utilizing epitaxial growth for precise channel width control, forming a single-sided buried strap structure after the trench isolation layer, and a reversed U-shaped gate dielectric layer to enhance electric current and avoid damage to the gate dielectric layer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the feature size of the semiconductor device is reduced to increase device density, then the quantity of devices per area increases, but charge accumulates in the channel region causing floating body effect that degrades device performance
Solution Approach 1:
The patent extracts the accumulated charge from the channel region by introducing a doped channel layer that provides a conduction path to the substrate. This removes the harmful charge accumulation that causes floating body effect while maintaining the scaled-down device structure for high density.
Solution Approach 2:
The doped channel layer acts as an intermediary structure between the channel region and the substrate. It provides a controlled conduction path that mediates the charge transfer, allowing accumulated charge to be discharged to the substrate without directly modifying the main transistor structure.
2Reliability
If the channel width is not precisely controlled, then manufacturing is easier, but device performance and capacity cannot be improved
Solution Approach 1:
The patent performs preliminary action by forming the doped channel layer and defining the channel structure before final transistor fabrication steps. This preliminary structuring establishes precise channel width boundaries that guide subsequent processing, ensuring accurate dimensional control.
Solution Approach 2:
The patent utilizes parameter changes in the epitaxial growth process to precisely control channel width. By adjusting growth conditions and layer thickness parameters, the channel dimensions are accurately defined, enabling high-performance devices with controlled characteristics.
3Ease of manufacture
If the single-sided buried strap structure is formed before the trench isolation layer, then the process sequence is simplified, but excessive diffusion of doped ions occurs
Solution Approach 1:
The patent performs preliminary action by forming the trench isolation layer first to establish isolation boundaries and protective structures. This preliminary isolation prevents excessive ion diffusion during subsequent doping steps, while the process sequence remains manageable through careful planning.
4Productivity
If the vertical transistor is formed before the trench isolation layer, then the process is more efficient, but the gate dielectric layer is damaged reducing device reliability
Solution Approach 1:
The patent performs preliminary action by forming the trench isolation layer and protective structures before creating the vertical transistor. This preliminary preparation protects the gate dielectric layer from damage during subsequent high-stress processing steps, ensuring device reliability while maintaining reasonable process efficiency.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively prevents the floating body effect, allowing for increased device density and improved performance by accurately controlling channel dimensions and reducing ion diffusion and gate dielectric damage.
Implementation Method 1
a doped channel layer, so that the accumulated charge can be transferred to the substrate through the doped channel layer to avoid floating body effect
Implementation Method 2
the channel width of the vertical transistor can be accurately controlled by using an epitaxial growth method
Implementation Method 3
a reversed U-shaped gate dielectric layer slightly covers an epitaxial layer, so that the electric current passing through the epitaxial layer can be increased (i.e. the depletion region is increased)
Data Source
AI summary
A trench-type semiconductor device structure is disclosed. The structure includes a semiconductor substrate, a gate dielectric layer and a substrate channel structure. The semiconductor substrate includes a trench having an upper portion and a lower portion. The upper portion includes a conductive layer formed therein. The lower portion includes a trench capacitor formed therein. The gate dielectric layer is located between the semiconductor substrate and the conductive layer. The substrate channel structure with openings, adjacent to the trench, is electrically connected to the semiconductor substrate via the openings.