Trench Semiconductor Structure for Low-Loss Oscillation Suppression
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Solution Overview
Problem
Existing semiconductor devices face challenges in efficiently managing electric field strength and on-state power loss, particularly due to variations in trench bottom region thickness and accumulation region profiles.
Innovation Solution
The semiconductor device incorporates a second accumulation region and a trench bottom region with controlled thickness, formed through specific ion implantation processes, to optimize the doping concentration profiles and reduce on-state power loss.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the trench bottom region thickness is increased to suppress gate oscillation, then the reliability improves, but the on-state power loss increases
Solution Approach 1:
The patent applies local quality by creating distinct doping concentration zones within the accumulation region. The first accumulation region has a doping concentration of 1×10^18 to 1×10^19 atoms/cm³, while the second accumulation region has a lower doping concentration of 1×10^17 to 1×10^18 atoms/cm³. This spatial variation in doping concentration allows the device to achieve both gate oscillation suppression (through the first accumulation region) and reduced on-state power loss (through the second accumulation region with lower doping), resolving the technical contradiction.
Solution Approach 2:
The patent segments the accumulation region into two distinct regions: a first accumulation region closer to the gate electrode with higher doping concentration, and a second accumulation region farther from the gate electrode with lower doping concentration. This segmentation allows each sub-region to perform its specific function - the first region suppresses gate oscillation while the second region reduces on-state power loss - thereby resolving the contradiction between reliability and energy loss.
2Reliability
If the doping concentration is increased to improve electric field management, then the reliability improves, but the manufacturing precision requirements increase
Solution Approach 1:
The patent divides the doping structure into two distinct accumulation regions with different doping concentrations. The first accumulation region uses higher doping (1×10^18 to 1×10^19 atoms/cm³) for electric field management, while the second accumulation region uses lower doping (1×10^17 to 1×10^18 atoms/cm³). This segmentation allows each region to be optimized independently, reducing the overall manufacturing precision requirements compared to a uniform high-doping structure.
Solution Approach 2:
The patent implements local quality by assigning different doping concentrations to different spatial locations within the accumulation region. The higher doping concentration is localized to the first accumulation region near the gate electrode where electric field management is critical, while the lower doping concentration is applied to the second accumulation region. This localized approach improves reliability where needed without uniformly increasing manufacturing complexity throughout the entire device.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively suppresses gate oscillation and arm short-circuit oscillation, while reducing on-state power loss and enhancing the overall performance of the semiconductor device.
Implementation Method 1
formed through specific ion implantation processes
Data Source
AI summary
Provided is a semiconductor device including a transistor portion, where the semiconductor device includes: a plurality of trench portions; a drift region of a first conductivity type provided in a semiconductor substrate; a base region of a second conductivity type provided above the drift region; an emitter region of the first conductivity type provided above the base region; a first accumulation region of the first conductivity type provided below the base region; a trench bottom region of the second conductivity type provided below the first accumulation region; and a second accumulation region of the first conductivity type provided at a position deeper than that of the trench bottom region in a depth direction of the semiconductor substrate and having a higher doping concentration than the drift region, where the transistor portion includes a collector region of the second conductivity type on a back surface of the semiconductor substrate.