Trench-Shielded Power MOSFET Layout for Gate Oxide Reliability
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Gate oxide layers in power MOSFETs are susceptible to breakdown due to high electric fields, leading to premature device failure, and existing trench shielding regions increase on-state resistance and cell pitch, compromising device performance.
Innovation Solution
The implementation of trench shielding regions with inwardly angled sidewalls and super junction structures, formed using channeled ion implantation techniques, reduces electric field stress on the gate oxide while maintaining or improving on-state resistance and integration density.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If trench shielding regions are added to reduce electric field stress on gate oxide, then reliability of gate oxide layer is improved, but on-state resistance increases and cell pitch increases
Solution Approach 1:
The patent applies local quality by creating a trench shielding region with varying doping concentration - heavily doped near the gate oxide interface where electric field stress is highest, and lightly doped deeper in the drift region. This localized variation in doping quality provides maximum electric field reduction exactly where needed to protect the gate oxide, while minimizing the overall impact on on-state resistance and cell pitch.
Solution Approach 2:
The patent changes the doping concentration parameter within the trench shielding region, transitioning from heavy doping near the gate oxide to light doping deeper in the drift region. This parameter gradient allows the shielding region to effectively reduce electric field stress on the gate oxide while maintaining lower on-state resistance compared to uniformly heavily doped structures, thereby improving integration density.
2Reliability
If trench shielding regions with conventional structures are used, then electric field stress on gate oxide is reduced, but device performance deteriorates due to increased on-state resistance
Solution Approach 1:
The patent implements local quality by concentrating heavy doping in the upper portion of the trench shielding region where electric field stress on the gate oxide is most severe, while using lighter doping in the lower portion. This localized approach provides effective electric field reduction to protect the gate oxide from breakdown, while minimizing the increase in on-state resistance that would result from uniform heavy doping throughout the entire trench shielding region.
Solution Approach 2:
The patent employs parameter changes by creating a doping concentration gradient within the trench shielding region - heavily doped near the gate oxide interface and lightly doped deeper down. This gradient structure effectively reduces the peak electric field stress on the gate oxide to prevent breakdown, while the lighter doping deeper in the drift region minimizes the impact on on-state resistance, thereby reducing the harmful effects on device performance.
3Reliability
If gate oxide layer thickness is increased to prevent breakdown, then reliability is improved, but device dimensions increase and integration density decreases
Solution Approach 1:
The patent introduces a trench shielding region as an intermediary structure between the gate oxide layer and the drift region. This shielding region, with its controlled doping profile, acts as a mediator that reduces the electric field stress transmitted to the gate oxide. As a result, the gate oxide layer can maintain its thin dimensions for high integration density while still achieving the necessary reliability through the protective effect of the trench shielding region.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enhances the reliability of gate oxide layers by reducing electric field intensity, maintains or improves on-state resistance, and allows for tighter cell packing, thereby optimizing device performance and integration.
Implementation Method 1
Gate oxide layers in power MOSFETs are susceptible to breakdown due to high electric fields
Implementation Method 2
a trench shielding region having a second conductivity type... at least a portion of the trench shielding region comprises sidewalls that angle inwardly
Implementation Method 3
formed using channeled ion implantation techniques
Data Source
AI summary
A semiconductor device comprises a semiconductor layer structure that comprises a drift region having a first conductivity type and a trench shielding region having a second conductivity type, and a gate trench extending in a longitudinal direction in the semiconductor layer structure. The trench shielding region extends in the longitudinal direction underneath the gate trench, and at least a portion of the trench shielding region comprises sidewalls that angle inwardly with increasing distance from the gate trench.