Trench Isolation Shielding Layer for HEIP-Resistant pMOS Devices

Solution Overview

Problem

The increased integration density in semiconductor devices leads to degraded voltage and current characteristics due to the hot electron induced punchthrough (HEIP) phenomenon, particularly in pMOS transistors, where hot electrons penetrate the device isolation layer and trap charge, attracting holes and reducing the effective channel length, causing device defects.

Innovation Solution

A semiconductor device structure is designed with a trench defining an active region, featuring a first insulating layer, a shielding layer with spaced apart particles, a second insulating layer, and a gap-fill insulating layer, which mitigates the HEIP phenomenon by preventing hole concentration in the active region, thereby maintaining channel length and reducing device defects.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the integration density of semiconductor devices is increased, then the number of transistors per unit area is improved, but the voltage and current characteristics are degraded due to the HEIP phenomenon

Engineering Contradiction:

Improveintegration densityVSAvoidvoltage and current characteristics

Core Design Contradiction:

ProductivityVSReliability

Solution Approach 1:

A shielding layer comprising spaced apart particles is introduced between the active region and the device isolation layer. This intermediary structure prevents hot electrons generated in the active region from penetrating into the device isolation layer, thereby blocking the HEIP phenomenon while maintaining high integration density.

Inventive Principle:

Principle #24Intermediary (Mediator)

Solution Approach 2:

The shielding layer is designed with a porous structure comprising spaced apart particles rather than a continuous layer. This porous configuration allows the shielding layer to effectively block hot electron penetration while minimizing interference with conductive structures such as bit line structures that need to contact the device isolation layer.

Inventive Principle:

Principle #31Porous materials

2Reliability

If a continuous shielding layer is used to prevent HEIP, then the protection against hot electron penetration is improved, but the contact between shielding layer and conductive structures increases causing device defects

Engineering Contradiction:

Improveprotection against HEIPVSAvoidcontact between shielding layer and conductive structures

Core Design Contradiction:

ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The shielding layer is designed with a porous structure comprising spaced apart particles rather than a continuous layer. This porous configuration allows the shielding layer to effectively block hot electron penetration while minimizing interference with conductive structures such as bit line structures that need to contact the device isolation layer.

Inventive Principle:

Principle #31Porous materials

Solution Approach 2:

The shielding layer is segmented into multiple spaced apart particles rather than forming a continuous layer. This segmentation reduces the contact area between the shielding layer and conductive structures, preventing short circuits and device defects while maintaining the hot electron blocking function.

Inventive Principle:

Principle #1Segmentation

3Productivity

If the gate length is reduced to increase transistor density, then the integration density is improved, but the hot electron induced punchthrough phenomenon is exacerbated

Engineering Contradiction:

Improvetransistor densityVSAvoidhot electron induced punchthrough

Core Design Contradiction:

ProductivityVSObject-affected harmful factors

Solution Approach 1:

A shielding layer comprising spaced apart particles is introduced between the active region and the device isolation layer. This intermediary structure prevents hot electrons generated in the active region from penetrating into the device isolation layer, thereby blocking the HEIP phenomenon while maintaining high integration density.

Inventive Principle:

Principle #24Intermediary (Mediator)

Data Source

PatentUS12382687B2Semiconductor device including insulating layers and method of manufacturing the same

Publication Date: 2025.08.05 SAMSUNG ELECTRONICS CO LTD

AI summary

A semiconductor device includes a trench defining an active region in a substrate, a first insulating layer on a bottom surface and side surfaces of the active region inside the trench, a shielding layer on a surface of the first insulating layer, the shielding layer including a plurality of spaced apart particles, a second insulating layer on the shielding layer and having first charge trapped therein, the plurality of spaced apart particles being configured to concentrate second charge having an opposite polarity to the charge trapped in the second insulating layer, and a gap-fill insulating layer on the second insulating layer in the trench.