Trench Sidewall Bit Line Structure to Avoid Pillar Over-Etching
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Solution Overview
Problem
The bit line in semiconductor structures has high resistance and a complex formation process due to over-etching, which damages the semiconductor pillar and affects the overall performance.
Innovation Solution
A semiconductor structure where the bit line is formed on the sidewall of a trench in the substrate, eliminating the need for over-etching at the bottom of the semiconductor pillar, and using a bit line isolation layer and metal silicide to reduce resistance and improve performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the bit line is formed using conventional over-etching method at the semiconductor pillar bottom, then the bit line can be connected to the semiconductor pillar, but the over-etching damages the semiconductor pillars and increases resistance
Solution Approach 1:
Instead of forming the bit line at the bottom of the semiconductor pillar through over-etching, the patent inverts the approach by forming the bit line on the sidewall of a trench that does not require etching into the pillar itself. The trench is formed in the substrate, and the bit line is deposited on the trench sidewall, thereby avoiding direct contact with and potential damage to the semiconductor pillar structure.
Solution Approach 2:
The patent transitions from a vertical connection approach (bit line at the bottom of the pillar) to a lateral connection approach (bit line on the sidewall of the trench). This dimensional change allows the bit line to connect to the semiconductor pillar through the substrate without requiring over-etching, thus avoiding pillar damage while maintaining electrical connection.
2Reliability
If the bit line is formed using conventional over-etching method, then the connection is achieved, but the resistance of the bit line becomes large
Solution Approach 1:
The patent inverts the conventional approach by not etching into the pillar to form the bit line connection. Instead, the bit line is formed on the trench sidewall and connects to the semiconductor pillar through the substrate, avoiding the high-resistance issue associated with over-etching and creating a lower-resistance electrical path.
3Ease of manufacture
If over-etching is performed to form the bit line, then the bit line connection is achieved, but the process becomes complex and damages the semiconductor pillars
Solution Approach 1:
The patent simplifies the manufacturing process by inverting the conventional approach: instead of performing complex over-etching to form the bit line at the pillar bottom, the bit line is formed on the sidewall of a trench that is etched into the substrate (not the pillar). This inversion eliminates the need for difficult over-etching steps and reduces process complexity.
Solution Approach 2:
The trench is formed in the substrate before the semiconductor pillars are fully processed, allowing the bit line to be positioned and formed in advance. This preliminary action simplifies subsequent processing steps and avoids the need for complex over-etching operations that would be required if the bit line were formed after pillar fabrication.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces the resistance of the bit line and enhances the structural integrity and performance of the semiconductor structure by avoiding the damage caused by over-etching and improving electrical connectivity.
Implementation Method 1
a bit line at least located on a sidewall of the trench, wherein both the bit line and the trench extend along a first direction; the bit line includes a metal layer and a metal silicide layer that are in contact with each other and extend along the first direction
Data Source
AI summary
Embodiments of the present disclosure relate to the field of semiconductors, and provide a semiconductor structure and a manufacturing method thereof. The semiconductor structure includes: a substrate provided with a plurality trenches arranged at intervals; a bit line at least located on a sidewall of the trench, wherein both the bit line and the trench extend along a first direction; a bit line isolation layer filled in the trench; a plurality of first semiconductor pillars arranged at intervals on a surface of the substrate; a plurality of word lines arranged at intervals, wherein the word lines are separated from the substrate and cover the first semiconductor pillars by a certain height, the word line extends along a second direction, and the second direction is different from the first direction; and a dielectric layer at least located between the first semiconductor pillar and the word line.


