Trench Termination Structure for Leakage Reduction
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Solution Overview
Problem
Semiconductor devices with trench termination structures face challenges in maintaining a stable electric field around the edge of the gate pad, leading to increased drain-source leakage current and reduced breakdown voltage, which degrades device efficiency.
Innovation Solution
The semiconductor device design eliminates the formation of a P-body area in the edge adjacent area of the gate pad, ensuring only an N-type substrate exists, thereby preventing electric field generation and minimizing drain-source leakage current by forming a non-formation section without a P-body area between trenches.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a P-body area is formed in the edge adjacent area of the gate pad, then the active area is increased and current flow capability is improved, but electric field is generated leading to increased drain-source leakage current and reduced breakdown voltage
Solution Approach 1:
The patent applies local quality by differentiating the structure in the edge adjacent area from the rest of the active area. Specifically, the P-body area is intentionally omitted only in the edge adjacent area of the gate pad, while maintaining P-body areas in other regions. This localized structural modification allows the device to maintain high current flow capability in the bulk active area while eliminating electric field generation at the critical edge region, thus reducing drain-source leakage current without significantly compromising overall productivity
2Area of stationary object
If a P-body area is formed in the edge adjacent area of the gate pad, then the active area is increased, but breakdown voltage is reduced
Solution Approach 1:
The patent applies local quality by differentiating the structure in the edge adjacent area from the rest of the active area. Specifically, the P-body area is intentionally omitted only in the edge adjacent area of the gate pad, while maintaining P-body areas in other regions. This localized structural modification allows the device to maintain high current flow capability in the bulk active area while eliminating electric field generation at the critical edge region, thus reducing drain-source leakage current without significantly compromising overall productivity
3Device complexity
If the space between trenches is not regularly maintained, then manufacturing complexity is reduced, but electric field cannot be stably supported
Solution Approach 1:
The patent applies the taking out principle by removing the P-body area formation process specifically from the edge adjacent area of the gate pad. This extraction of the problematic element (P-body in edge area) eliminates the source of electric field instability and drain-source leakage current without requiring regular maintenance of trench spacing throughout the entire device. The solution focuses on removing the harmful component rather than enforcing strict geometric regularity across all areas
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively reduces drain-source leakage current, stabilizes the breakdown voltage, and lowers substrate resistance, enabling high-speed switching and reduced turn-on resistance.
Implementation Method 1
by forming an oxide layer (i.e., SAC2 Ox, RESURF Ox, Field Ox) to an inside of trenches 21, 22, which are formed in the active area 20, an electric field is supported between trenches
Implementation Method 2
A P-body area 60, 60′ is formed in an upper area of the trench 21 side; an N+ source area 62 is formed through an N+ dopant ion implantation in the P-body area 60 among them
Data Source
AI summary
The present disclosure relates to a semiconductor device in which a trench termination structure is applied. There is disclosed a semiconductor device of which structure is partially improved so that a P body area is not formed in an adjacent area of a gate pad. The semiconductor device includes a gate pad formed on a substrate, an active area formed in the substrate and comprising trenches, an isolation area to isolates the gate pad and the active area, and a section of the active area adjacent to the gate pad where a P-body is not formed. According to such the semiconductor device, it is possible to minimize a drain-source leakage current and to stably secure a drain-source breakdown voltage.