Trench Power Transistor Layout for Active Clamp Back-EMF Control

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Solution Overview

Problem

Current semiconductor devices face challenges in efficiently managing back electromotive force and optimizing on-resistance during active clamp operations, which affects the performance and reliability of power transistors.

Innovation Solution

The semiconductor device incorporates a control IC with an active clamp circuit that individually controls system transistors to manage back electromotive force by adjusting on-resistance, using a configuration of n-system main transistors with trench gate structures and trench connection structures to optimize electrical characteristics.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If active clamp circuit is used to manage back electromotive force, then power transistor protection is improved, but on-resistance increases

Engineering Contradiction:
Improvepower transistor protectionVSAvoidon-resistance
Core Design Contradiction:
ReliabilityVSLoss of energy

Solution Approach 1:

The patent divides the main transistor into multiple system transistors (first system transistor and second system transistor) with independent control. This segmentation allows selective activation of transistors based on operational requirements, enabling the active clamp circuit to protect specific transistors without forcing all transistors into high-resistance states, thus resolving the contradiction between protection and on-resistance.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements dynamic control where the active clamp circuit selectively activates system transistors based on real-time operational conditions. The control circuit adjusts which transistors are active during different phases of operation, allowing the system to maintain low on-resistance when protection is not needed while providing protection when back electromotive force occurs.

Inventive Principle:
Principle #15Dynamics

2Reliability

If multiple system transistors are used for selective control, then active clamp protection is improved, but device complexity increases

Engineering Contradiction:
Improveactive clamp protectionVSAvoidtransistor configuration
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent combines multiple system transistors into a unified main transistor structure that shares common source and drain regions. This merging approach allows independent control of individual system transistors while maintaining a compact physical structure, reducing the complexity increase that would normally result from having multiple separately-controlled transistors.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent designs the system transistors to serve multiple functions: they can operate individually for selective protection, work together for high-current applications, and provide redundant protection paths. This multi-functionality reduces the need for additional dedicated protection components, thereby limiting the increase in device complexity while improving protection capabilities.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS20240030907A1Semiconductor device
Publication Date: 2024.01.25 ROHM CO LTD
  • US20240030907A1 patent drawing
  • US20240030907A1 patent drawing
  • US20240030907A1 patent drawing

AI summary

A semiconductor device includes a semiconductor chip which has a main surface and a main transistor which includes a first system transistor and a second system transistor that are each formed in the main surface so as to be individually controlled, in which the first system transistor includes a first composite cell which is constituted of an α-number (α≥2) of first unit transistors that are arrayed so as to be mutually adjacent to the main surface and that each have a first trench structure including a first electrode embedded in a first trench formed in the main surface, and the second system transistor includes a second composite cell which is arranged so as to be adjacent to the first composite cell and constituted of a β-number (β≥2) of second unit transistors that are arrayed so as to be mutually adjacent to the main surface and that each have a second trench structure including a second electrode embedded in a second trench formed in the main surface.