Trenched Isolation Void Trapping for Semiconductor Reliability
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Solution Overview
Problem
As semiconductor integration levels increase, it becomes increasingly difficult to uniformly fill trenched isolation regions with insulative material due to void formation, which alters the insulative properties of these regions.
Innovation Solution
The development of trenched structures that trap voids in specific regions of the trenches, allowing for controlled and uniform incorporation of voids across the substrate, rather than attempting to eliminate them, by creating narrow bottom portions with substantially vertical sidewalls and upper wide portions joined by perpendicularly extending steps, ensuring the voids are entirely within the narrow portions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If trenched isolation regions are made narrower and deeper to increase integration levels, then device density is improved, but void formation increases making uniform filling difficult
Solution Approach 1:
The trench is divided into two distinct portions: a narrow bottom portion and a wide upper portion, separated by steps. This segmentation allows the bottom portion to maintain narrow dimensions for high device density while the upper portion provides sufficient width for uniform insulative material deposition, thereby resolving the contradiction between device density and filling uniformity.
Solution Approach 2:
Different portions of the trench are given different widths to serve different functions. The bottom portion is kept narrow to maximize device density, while the upper portion is widened to facilitate uniform material deposition. This local variation in geometry allows each region to optimize its specific function, resolving the contradiction between density and uniformity.
2Ease of manufacture
If conventional trench filling methods are used, then manufacturing process is simple, but voids alter the insulative properties of isolation regions
Solution Approach 1:
The trench geometry parameters are changed by introducing steps that create a two-level structure with different widths. This parameter change modifies the deposition dynamics, allowing insulative material to be deposited uniformly in the upper portion while the bottom portion naturally excludes voids, thereby maintaining insulative properties without complicating the manufacturing process.
Solution Approach 2:
The steps are formed in the trench before insulative material deposition. This preliminary action creates a geometry that guides the subsequent deposition process, ensuring that material fills the upper portion uniformly and naturally excludes voids from the bottom portion, thereby preserving insulative properties through pre-configured geometry rather than post-processing.
3Reliability
If attempts are made to eliminate voids through conventional means, then insulative properties are maintained, but manufacturing complexity increases with multiple deposition steps
Solution Approach 1:
Instead of adding multiple deposition steps, the invention changes the geometric parameters of the trench by introducing steps that create width variation. This single geometric modification enables uniform material filling in one deposition step, eliminating voids and maintaining insulative properties without increasing manufacturing complexity.
Solution Approach 2:
Rather than attempting to eliminate voids through complex multi-step deposition processes, the invention inverts the approach by designing a trench geometry that naturally prevents void formation. The stepped structure with width variation causes material to deposit uniformly and exclude voids inherently, simplifying the manufacturing process while maintaining reliability.
Data Source
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AI summary
The invention includes semiconductor constructions having trenched isolation regions. The trenches of the trenched isolation regions can include narrow bottom portions and upper wide portions over the bottom portions. Electrically insulative material can fill the upper wide portions while leaving voids within the narrow bottom portions. The bottom portions can have substantially vertical sidewalls, and can join to the upper portions at steps which extend substantially perpendicularly from the sidewalls. The trenched isolation regions can be incorporated into a memory array, and/or can be incorporated into an electronic system. The invention also includes methods of forming semiconductor constructions.