Tri-State Current DAC Switching for Lower Zero-State Power

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Solution Overview

Problem

Current Digital-to-Analog Converters (DACs), particularly tri-state current DACs, consume power continuously regardless of input digital values, leading to wastage as they sink currents even when outputting no current.

Innovation Solution

A method and apparatus that monitor logical states of differential digital inputs to control tri-state current DAC cells, temporarily decreasing direct current through a middle path when the cell is instructed to switch to a zero output current state, utilizing a control device with a delay circuit, prediction unit, and switching control unit to manage the tri-state current DAC cells.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a tri-state current DAC continuously operates to maintain readiness for digital input changes, then the response speed and reliability are improved, but the current consumption increases continuously even when no current output is needed

Engineering Contradiction:
ImproveDAC response reliabilityVSAvoidcurrent consumption
Core Design Contradiction:
ReliabilityVSLoss of energy

Solution Approach 1:

The patent applies dynamics by making the DAC cell's current consumption state changeable based on operational needs. The system dynamically switches between a first current consumption state (when digital input changes are detected) and a second current consumption state (when no changes are detected), allowing the DAC to adapt its power usage to actual operational requirements rather than maintaining a fixed high-consumption state.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent implements periodic action through the monitoring mechanism that continuously checks for digital input changes. The DAC operates in a cycle of monitoring - when no changes are detected for a predetermined period, it transitions to the lower current consumption state. This periodic monitoring approach ensures the system remains responsive while reducing average power consumption during stable operating conditions.

Inventive Principle:
Principle #19Periodic action

2Loss of energy

If the tri-state current DAC reduces current consumption by entering a low-power state, then energy efficiency is improved, but the response time to detect and react to digital input changes may increase

Engineering Contradiction:
Improvecurrent consumptionVSAvoidresponse speed
Core Design Contradiction:
Loss of energyVSSpeed

Solution Approach 1:

The patent applies preliminary action by having the monitoring mechanism continuously check for digital input changes even when the DAC is in the low current consumption state. This preliminary monitoring ensures that when a digital input change occurs, the system can quickly detect it and transition back to the higher current consumption state, minimizing the response delay that would otherwise occur from being in a low-power state.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements feedback through the monitoring mechanism that detects digital input changes and triggers the transition from the second current consumption state back to the first current consumption state. This feedback loop ensures that the system responds promptly to actual operational needs, maintaining reliability while benefiting from reduced power consumption during stable periods.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS20110102225A1Method for reducing current consumption of digital-to-analog conversion, and associated tri-state current digital-to-analog converter
Publication Date: 2011.05.05 MEDIATEK INC
  • US20110102225A1 patent drawing
  • US20110102225A1 patent drawing
  • US20110102225A1 patent drawing

AI summary

A method for reducing current consumption of digital-to-analog conversion includes: monitoring logical states of a set of differential digital inputs, wherein the set of differential digital inputs are utilized for controlling at least one tri-state current Digital-to-Analog Converter (DAC) cell of a tri-state current DAC, and the tri-state current DAC cell has a positive output current state, a zero output current state and a negative output current state; and when the logical states of the set of differential digital inputs instruct the tri-state current DAC cell should output no positive/negative current, controlling the tri-state current DAC cell to switch to the zero output current state, temporarily decreasing a direct current passing through a middle path of the tri-state current DAC cell. An associated tri-state current DAC is also provided, where the tri-state current DAC includes: the at least one tri-state current DAC cell; and a control device.