Triangular Signal Generator With Step-Size Frequency Control
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Solution Overview
Problem
Existing signal generators, particularly those implemented in FPGAs, face challenges in efficiently adjusting amplitude and frequency of periodic output signals due to high computational complexity and resource requirements.
Innovation Solution
A signal generator that adjusts frequency and amplitude by determining a step size based on input parameters and applying it to the actual amplitude for a specified number of cycles, using a processing unit to generate triangular, square-wave, and sine signals through resource-efficient operations like bit shifting and multiplication, while outsourcing complex calculations to external units.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If function generators are used to adjust amplitude and frequency of output signals, then signal generation capability is improved, but computational complexity and resource requirements increase
Solution Approach 1:
The patent divides the signal generation process into discrete segments: a lookup table stores pre-computed signal values, and a counter sequentially accesses these values. This segmentation transforms a complex continuous computation into simple discrete table lookups, dramatically reducing computational complexity while maintaining full signal generation capability including amplitude and frequency adjustment.
Solution Approach 2:
The patent performs preliminary computation by pre-calculating and storing signal values in a lookup table before runtime. This preliminary action eliminates the need for complex real-time calculations during signal generation, allowing the system to achieve high adaptability with minimal computational resources by simply indexing pre-computed values.
2Adaptability or versatility
If function generators are implemented in FPGA, then flexible signal generation is achieved, but resource consumption increases
Solution Approach 1:
The patent uses a lookup table that stores copies of pre-computed signal values. Instead of computing signal values repeatedly during operation, the system copies these values into a table structure that can be efficiently accessed multiple times. This copying approach reduces FPGA resource consumption by replacing complex computational logic with simple memory access operations.
Solution Approach 2:
The patent replaces the mechanical/computational system of real-time signal calculation with a memory-based system. Complex arithmetic operations are substituted with simple table indexing and data retrieval operations, significantly reducing the logical resources required in the FPGA while maintaining flexible signal generation capabilities.
3Measurement precision
If complex signal calculations are performed in real-time, then accurate signal generation is achieved, but processing time increases
Solution Approach 1:
The patent performs signal calculations in advance and stores the results in a lookup table. During real-time operation, the system simply retrieves pre-computed values instead of performing calculations, thereby maintaining high signal accuracy while minimizing processing time. The time-consuming computational work is shifted to the initialization phase.
Solution Approach 2:
The patent implements periodic signal generation by using a counter that cycles through the lookup table entries in sequence. This periodic access pattern efficiently generates continuous signals with accurate waveforms while minimizing processing time, as each signal period simply requires traversing the pre-computed table once.
Data Source
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AI summary
A signal generator (112) is proposed. The signal generator (112) is configured to generate at least one periodic output signal. The output signal comprises a triangular waveform, the frequency and amplitude of which are adjustable. The signal generator (112) is configured to receive at least one input parameter. The input parameter includes at least information about a desired amplitude and a desired frequency of the output signal. The signal generator (112) has at least one processing unit (116). The processing unit (116) is configured to determine the direction of the output signal. The processing unit (116) is configured to determine a step size.The processing unit (116) is set up to apply an actual amplitude as a function of the signal direction for a number of clock cycles with the step size, the number of clock cycles depending on the target frequency of the output signal.