Hardware Trigger Point Module for Non-Invasive Debug Synchronization
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Solution Overview
Problem
Existing synchronization mechanisms for computer program execution with environmental parameters or RTL simulators are invasive, requiring source code changes, affecting signal measurements, and offering low temporal accuracy due to reliance on CPU instructions and microarchitecture delays.
Innovation Solution
A computing platform with trigger point modules that allow synchronization of program execution with environmental parameters or RTL simulators without modifying the source code, using hardware-level trigger points to synchronize with environmental signals like power or temperature, and enabling precise temporal alignment without affecting signal measurements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If software trigger points are used to synchronize computer program execution with environmental parameters or RTL simulators, then synchronization capability is provided, but source code modification is required and temporal accuracy is reduced due to CPU instruction delays
Solution Approach 1:
The patent introduces a hardware trigger point module as an intermediary between the CPU and external synchronization devices. This module includes a trigger point register that stores trigger point information and a trigger point output unit that generates synchronization signals. The hardware module mediates the synchronization process without requiring CPU instruction execution, thereby eliminating the temporal delays inherent in software-based approaches while maintaining synchronization versatility.
Solution Approach 2:
The patent replaces the software-based trigger point mechanism with a hardware-based implementation. Instead of using CPU instructions to set and clear GPIO pins for synchronization, the system uses dedicated hardware trigger point modules that directly generate synchronization signals. This substitution eliminates the dependency on CPU instruction execution cycles, thereby significantly improving temporal accuracy while preserving the synchronization functionality.
2Adaptability or versatility
If software trigger points are implemented through CPU instructions, then synchronization is achieved, but the measurement process is affected by additional CPU execution overhead
Solution Approach 1:
The hardware trigger point module serves as an intermediary that handles synchronization operations independently of the CPU execution path. The module includes a trigger point register for storing configuration and a trigger point output unit for generating synchronization signals, allowing the CPU to focus on application execution without being burdened by synchronization overhead.
Solution Approach 2:
The patent segments the synchronization function from the CPU execution path by implementing a dedicated hardware trigger point module. This modular approach separates the synchronization subsystem (with its own registers and output units) from the main CPU workflow, allowing both to operate independently and efficiently without interfering with each other's performance.
3Measurement precision
If hardware trigger points are used for synchronization, then temporal accuracy is improved, but device complexity increases
Solution Approach 1:
The patent applies local quality by implementing trigger point functionality only where synchronization is needed, rather than modifying the entire CPU architecture. The trigger point module includes specific registers (trigger point register) and output units localized to the synchronization function, maintaining simplicity in the core CPU while adding complexity only in the necessary peripheral components.
Solution Approach 2:
The hardware trigger point module is designed with multi-functionality to reduce overall system complexity. The trigger point register can store various types of trigger information, and the output unit can generate synchronization signals for different purposes (environmental parameter synchronization, RTL simulator synchronization, etc.), consolidating multiple synchronization needs into a single versatile hardware component.
Data Source
AI summary
The present disclosure relates to a computing platform and a relative computer implemented method for synchronize the prototype execution and simulation of hardware devices. The computing platform (1) comprises a debugger module (2), a memory (3) for storing instructions and data of a computer program; a CPU (4) configured for executing said computer program; said debugger module (2) being in signal communication with said memory (3) through a first debugger channel (dbg2Mem). Characteristic of the computing platform is that it comprises at least one pin (7) and at least one trigger point module (8), said at least one pin (7) being connectable to an electronic device (Ext) that is external to the computing platform; said at least one trigger point module (8) being in signal communication with said at least one pin (7) through a first trigger channel (tgr2pin), said debugger module (2) through a second trigger channel (t2d), said CPU (4) through a third trigger channel (tProbe), said at least one trigger point module (8) having a first register (10a) for storing a first trigger point (RefStartTrgPnt) that corresponds to a first instruction of said program to be monitored.