Real-Time Trigger Sequence Checker for Fault Detection
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Solution Overview
Problem
Real-time control systems face challenges in verifying the correct sequence of trigger signals, as faults in these sequences can only be checked after millions of cycles, and simulation techniques are inaccurate and time-consuming.
Innovation Solution
A real-time trigger sequence checker system that monitors predetermined sequences of triggers, generates error signals for faulty operations, and is configurable for learning mode to capture and verify timing constraints, using a processing unit, sequence rule memory, and trigger detector to ensure sequence conformity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If simulation techniques are used to predict faulty trigger sequences, then fault detection capability is improved, but the process becomes time-consuming and suffers from inaccuracies
Solution Approach 1:
The patent implements a learning mode that captures and stores the correct trigger sequence rules in advance during a calibration phase. This preliminary action allows the system to have the reference sequence readily available when real-time verification is needed, eliminating the need for time-consuming simulation or analysis during actual operation.
Solution Approach 2:
The patent replaces simulation techniques with a direct hardware-based comparison mechanism. The trigger sequence checker directly compares incoming trigger signals against stored reference sequences using digital logic circuits, providing accurate and instantaneous verification without the inaccuracies and time delays inherent in simulation methods.
2Measurement precision
If trigger sequence verification is performed on live systems operating many millions of cycles, then fault detection accuracy is improved, but the system cannot identify faults prior to market release
Solution Approach 1:
The system performs preliminary learning and storage of correct trigger sequences during the calibration phase before the system is deployed. This allows the verification function to be fully operational from the start, enabling pre-release fault detection without requiring millions of live cycles to accumulate verification data.
Solution Approach 2:
The patent creates a copy of the correct trigger sequence rules and stores them in a dedicated memory structure within the trigger sequence checker. This copy serves as a reference for real-time verification, allowing the system to detect faults by comparing actual sequences against the stored reference, thereby enabling accurate pre-release fault detection.
3Speed
If a real-time trigger sequence checker is implemented, then fault indication speed is improved, but device complexity increases
Solution Approach 1:
The patent introduces a dedicated trigger sequence checker as an intermediary component between the trigger signal source and the system being controlled. This specialized component handles the complex sequence verification logic, keeping the main control system simple while providing real-time fault detection through its error output signal.
Solution Approach 2:
The trigger sequence checker is designed as a self-contained module that combines learning, storage, and verification functions in a single device. It can operate in different modes (learning mode and verification mode) and handles multiple trigger sequences, providing multi-functionality that reduces the need for additional separate components.
Data Source
AI summary
A system, and in particular a system operating in real-time, may have its operation rely on a particular sequence of trigger signals, hardware or software, for proper operation. A trigger sequence checker provides a way to monitor in real-time predetermined sequences of triggers and is configured to generate an error signal upon detection of a faulty operation or sequence. Rules for sequences of triggers are stored in memory and are used by the trigger sequence checker to verify one or more sequences of triggers received as an input to the checker. A plurality of triggers may be handled by the checker. In one embodiment the checker is configurable to be set in a learning mode to capture triggers rules.


