Triggered Instruction Transfer Between Processing Elements
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Solution Overview
Problem
Existing data processing architectures are limited by the von-Neumann bottleneck and lack flexibility in operation modes, hindering efficient concurrent processing and power management.
Innovation Solution
A triggered spatial architecture with processing elements that generate triggered instructions based on execution states, allowing asynchronous operation and flexible mode switching between producing and consuming modes, with shared front-end circuitry and power-saving states.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If processing elements operate independently and asynchronously in triggered spatial architecture, then concurrent processing efficiency is improved, but complexity of coordinating instruction transmission and execution modes increases
Solution Approach 1:
The system segments instruction transmission into two distinct modes: producing mode where a processing element generates and transmits triggered instructions to others, and consuming mode where processing elements receive and execute instructions. This segmentation allows independent asynchronous operation while providing clear coordination protocols through mode switching, resolving the contradiction between concurrency and coordination complexity.
2Adaptability or versatility
If processing elements switch between producing and consuming modes, then flexibility and power management are improved, but complexity of mode switching and instruction transmission increases
Solution Approach 1:
The system implements dynamic mode switching where processing elements can transition between producing and consuming modes based on operational needs. The decode circuitry dynamically generates different control signals (begin producing control signals vs. begin consuming control signals) to enable flexible adaptation. This dynamic behavior allows the system to optimize power consumption and resource utilization while maintaining manageable switching complexity through standardized transition protocols.
3Device complexity
If front end circuitry is shared among processing elements, then device complexity is reduced, but reliability of independent operation and instruction generation decreases
Solution Approach 1:
The front end circuitry is designed as universal shared resources that can serve multiple processing elements. The decode circuitry is configured to receive different types of instructions (including begin producing and begin consuming instructions) and generate appropriate control signals accordingly. This multi-functionality allows reduced circuitry complexity while maintaining reliable independent operation through software-controlled mode switching and instruction generation protocols.
Data Source
AI summary
There is provided a data processing apparatus and a method of operating a data processing apparatus. The data processing apparatus comprises a plurality of processing elements connected via a network on a single chip arranged to form a triggered spatial architecture. Each processing element comprises front end circuitry configured to generate triggered instructions which are passed to decode circuitry to cause the processing element to perform processing operations. Some processing elements are configured to operate in a producing mode in which the processing element transmits the triggered instructions as consumer instructions to be executed by each of a set of processing elements when operating in a consuming mode. Some processing elements are configured to operate in the consuming mode in which the processing elements retrieve consumer instructions transmitted from a processing element operating in a producing mode, and pass the consumer instructions to the decode circuitry.