Semiconductor Patterning with Trimmed Spacer Etch Masks

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Solution Overview

Problem

Existing methods for forming patterns in semiconductor devices, such as FinFETs, face challenges in achieving varying line widths due to the limitations of double-patterning technologies using spacers, which typically result in patterns with the same line width.

Innovation Solution

The method involves forming sacrificial film patterns and spacers on a semiconductor substrate, removing the sacrificial films, trimming the spacers to achieve different line widths, and using the trimmed spacers as etch masks to form hard mask film patterns, allowing for the creation of semiconductor patterns with varying line widths while maintaining equal pitches between neighboring portions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If spacer-based double-patterning technology is used to form patterns, then pattern formation is achieved, but all patterns have the same line width which limits design flexibility

Engineering Contradiction:
Improveline width variation capabilityVSAvoidpattern formation process
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent applies local quality by introducing a trimming process that selectively modifies the line width of spacers in specific regions. The trimming step removes material from spacer sidewalls to create different line widths (first line width for first spacers, second line width for second spacers) while maintaining the same pitch, enabling local variation in pattern dimensions without changing the overall patterning process

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent segments the patterning process into distinct stages: forming sacrificial patterns, depositing spacers, removing sacrificial patterns, and selectively trimming spacers. This segmentation allows independent control of spacer dimensions at different locations, enabling the formation of semiconductor patterns with varying line widths from a unified process flow

Inventive Principle:
Principle #1Segmentation

2Adaptability or versatility

If traditional spacer-based double-patterning is used, then manufacturing simplicity is maintained, but design freedom for varying line widths is lost

Engineering Contradiction:
Improvedesign freedomVSAvoidline width control
Core Design Contradiction:
Adaptability or versatilityVSManufacturing precision

Solution Approach 1:

The patent applies preliminary action by forming all spacers with a uniform initial line width before the trimming step. This preliminary uniform formation ensures precise control and consistency, while the subsequent selective trimming introduces the desired variation. The preliminary uniform spacer formation serves as a controlled baseline from which precise line width variations are intentionally created

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables the formation of semiconductor patterns with different line widths, enhancing design freedom and allowing for the fabrication of FinFETs with varying threshold voltages, thereby overcoming the limitations of traditional spacer-based double-patterning technologies.

Implementation Method 1

forming first and second hard mask film patterns by etching the hard mask film using the first spacer and the trimmed second spacer as an etch mask

Methodology Applied
Scientific EffectEtching:

Implementation Method 2

forming first and second semiconductor patterns having different line widths by etching the semiconductor substrate using the first and second hard mask film patterns as an etch mask

Methodology Applied
Scientific EffectEtching:

Data Source

PatentUS8906757B2Methods of forming patterns of a semiconductor device
Publication Date: 2014.12.09 SAMSUNG ELECTRONICS CO LTD
  • US8906757B2 patent drawing
  • US8906757B2 patent drawing
  • US8906757B2 patent drawing

AI summary

Methods of forming patterns of a semiconductor device are provided. The methods may include forming a hard mask film on a semiconductor substrate. The methods may include forming first and second sacrificial film patterns that are spaced apart from each other on the hard mask film. The methods may include forming a first spacer on opposing sidewalls of the first sacrificial film pattern and a second spacer on opposing sidewalls of the second sacrificial film pattern. The methods may include removing the first and second sacrificial film patterns. The methods may include trimming the second spacer such that a line width of the second spacer becomes smaller than a line width of the first spacer. The methods may include forming first and second hard mask film patterns by etching the hard mask film using the first spacer and the trimmed second spacer as an etch mask.