Programmable Trimming Bit Circuit for High-Voltage Drive Current Control
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Solution Overview
Problem
Existing programmable current functionality is limited to low-voltage drive chips, making it difficult to adjust high-voltage driving current sources and sinks, increasing debugging complexity and cost due to the need for external resistors and complex processes.
Innovation Solution
A programmable trimming bit implementation circuit that generates a pulse clock signal to latch current input signals, using a current mirror circuit to adjust drive currents, allowing for programmable high-voltage driving source and sink currents through electrical pulses and latching, with no power consumption after programming, and enabling conversion from low-voltage to high-voltage domains using high-voltage NMOS devices.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If external resistors are used to adjust high-voltage driving currents, then current adjustment is possible, but debugging complexity and cost increase
Solution Approach 1:
The patent extracts the current adjustment functionality from external components and integrates it directly into the high-voltage driver chip through internal resistors and control circuits, eliminating the need for external debugging components while maintaining current adjustment capability
Solution Approach 2:
The patent implements a universal current adjustment mechanism that can control both source current and sink current through a unified control interface, allowing single-chip programmable adjustment for high-voltage driving currents in different applications
2Adaptability or versatility
If external resistors are used to adjust high-voltage driving currents, then current adjustment is possible, but working time and cost increase
Solution Approach 1:
The patent incorporates pre-designed internal resistor networks and control circuits within the driver chip that are ready for immediate use, eliminating the need for external debugging personnel to add or adjust external components, thus reducing debugging time to minimal programming operations
3Ease of operation
If programmable current functionality is implemented in low-voltage drivers, then current control is flexible, but high-voltage driving cannot achieve similar functionality
Solution Approach 1:
The patent extends programmable current control to high-voltage domain by implementing voltage-domain-adaptive control circuits that can operate at high voltages, allowing the same flexible programming interface to control currents in both low-voltage and high-voltage driving scenarios through parameter adaptation
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables flexible and cost-effective adjustment of high-voltage driving currents, reducing system debugging complexity and cost by allowing on-line programmable current control in high-voltage domains, while avoiding power consumption and simplifying the implementation process.
Implementation Method 1
a current mirror circuit configured to provide drive currents for the pulse-generating circuit and the latch circuit
Data Source
Figure 1
Figure 2
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AI summary
A programmable trimming bit implementation circuit (fig. 2, 3) and a driving circuit (fig. 1: without Q1, Q2, fig. 4) are provided, and the programmable trimming bit implementation circuit includes: a pulse-generating circuit (fig. 2: TD0, TPD1, U7-U11, fig. 3: U16, U17) configured to generate a pulse clock signal (CLK_HS) to be provided to a latch circuit (fig. 2: U1, fig. 3: U23); a latch circuit configured to latch bits of programmable current input signals (fig. 2: D0_HS, fig. 3: D1_HS) by applying the pulse clock signal; a current mirror circuit (fig. 2: IB1, NM0, NM1, NM2, fig. 3: NM3) configured to provide drive currents for the pulse-generating circuit and the latch circuit; and a programmable drive current implementation circuit (fig. 1: without Q1, Q2, fig. 4) configured to adjust currents (current sources: MP1to MP4, current sink: MN1 to MN4) based on the latched bits (fig. 2: B0_HS, fig. 3: B1_HS).