Tri-layer Photoresist Stack for Hard Mask Trimming
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Solution Overview
Problem
Current methods for trimming hard mask layers in semiconductor manufacturing face challenges due to the poor etching resistance and thickness limitations of 193 nm photo resist layers, leading to flawed gate structures and line collapse issues, which hinder the achievement of the 45 nm channel length requirement.
Innovation Solution
A tri-layer photo resist layer stack comprising a top photo resist layer, a silicon-containing photo resist layer, and a bottom anti-reflective coating (BARC) is used, where the silicon-containing layer is patterned to form openings in the hard mask layer, allowing for controlled etching and trimming to achieve the desired gate width, thereby avoiding line collapse and ensuring high etching selectivity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If 193 nm photo resist layer is used for trimming, then lithography resolution is improved, but etching resistance deteriorates and thickness is reduced
Solution Approach 1:
The patent divides the photo resist system into multiple layers: a bottom anti-reflective coating layer (BARC) made of 365 nm photo resist with high etching resistance, and a top imaging layer made of 193 nm photo resist for high resolution. This segmentation allows each layer to perform its specialized function without compromise.
Solution Approach 2:
The patent uses composite photo resist materials with different properties in each layer. The BARC layer uses 365 nm photo resist material known for high etching resistance, while the imaging layer uses 193 nm photo resist material optimized for lithography resolution. This composite approach combines the advantages of both material types.
2Manufacturing precision
If 193 nm photo resist layer thickness is reduced, then focus latitude in lithography is improved, but minimum requirement thickness is not met
Solution Approach 1:
The patent segments the thickness requirement between two layers: the BARC layer provides the necessary thickness for etching resistance and structural support, while the imaging layer is kept thin to improve focus latitude and CD control. This segmentation resolves the thickness conflict.
Solution Approach 2:
The BARC layer acts as an intermediary that provides the thickness buffer needed for etching resistance, allowing the imaging layer to be thinner than it would otherwise need to be. This intermediary layer mediates between the conflicting requirements of thickness and focus latitude.
3Manufacturing precision
If hard mask layer is trimmed to reduce gate line width, then channel length requirement is met, but gate structure quality deteriorates due to line collapse
Solution Approach 1:
The patent applies beforehand cushioning by using the thick BARC layer to provide structural support during the trimming etch process. This pre-positioned support structure prevents line collapse before it can occur, protecting the gate structure integrity while allowing precise width control.
Solution Approach 2:
The BARC layer serves as an intermediary protective structure during trimming. It mediates between the trimming process and the gate structure, absorbing the mechanical stress that would otherwise cause line collapse, thus protecting the final gate structure quality.
4Measurement precision
If double photo resist layer is used instead of single layer, then lithography resolution is improved, but process complexity increases
Solution Approach 1:
The patent segments the photo resist function into two specialized layers with distinct purposes: BARC for etching resistance and imaging for resolution. This functional segmentation achieves high performance while keeping each layer relatively simple and well-understood.
Solution Approach 2:
The BARC layer performs multiple functions: it provides etching resistance, acts as a structural support during trimming, and serves as a foundation for the imaging layer. This multi-functionality reduces the need for additional specialized layers, offsetting the complexity of having two photo resist layers.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The tri-layer photo resist layer stack enables precise control of critical dimensions and prevents line collapse during the etching process, resulting in a more reliable method for forming MOS transistor gates with ideal gate lengths, improving the overall semiconductor manufacturing process.
Implementation Method 1
The imaging layer is patterned by a photolithographic process
Implementation Method 2
an etching procedure is performed to pattern the hard mask layer 108
Data Source
AI summary
A method of trimming hard mask is provided. The method includes providing a substrate, a hard mask layer, and a tri-layer stack on the substrate. The tri-layer stack includes a top photo resist layer, a silicon photo resist layer, and a bottom photo resist layer. The top photo resist layer, the silicon photo resist layer, the bottom photo resist layer, and the hard mask layer are patterned sequentially. A trimming process is performed on the hard mask layer. The bottom photo resist layer of the present invention is thinner and loses some height in the etching process, so the bottom photo resist layer will not collapse.