Trimming Reference Resistance in Resistive Memory

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Solution Overview

Problem

Resistive memory devices face variations in reference resistance values due to process variations, leading to reduced read sensing margins and die yield, which existing technologies fail to address effectively without external testing circuitry.

Innovation Solution

A system and method within the resistive memory device that measures and trims reference resistance levels to a target level based on effective reference resistances across multiple word lines, using internal circuitry to automatically adjust resistance values without external testing, thereby reducing variations and improving sensing margins.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If reference resistance values are used without trimming, then the device structure remains simple, but reference resistance variations reduce read sensing margins and die yield

Engineering Contradiction:
Improveread sensing marginVSAvoidreference cell structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The reference array is divided into multiple segments, each with its own reference cells. This segmentation allows independent trimming of each segment's reference resistance without affecting the entire array, enabling localized compensation for process variations while maintaining overall system simplicity

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The reference cells are designed to perform dual functions: serving as reference elements during normal operation and as measurement elements during trimming operations. This self-service capability eliminates the need for separate external testing circuitry, improving reliability while avoiding increased device complexity

Inventive Principle:
Principle #25Self-service

2Reliability

If external testing circuitry is used to trim reference resistance, then read sensing margins improve, but device complexity and manufacturing cost increase

Engineering Contradiction:
Improvedie yieldVSAvoidtesting circuitry
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The trimming circuitry is merged with the existing reference cell structure and sensing amplifiers. The same sensing amplifiers used during normal operation are repurposed to measure reference resistance during trimming, and the reference cells themselves serve as both reference elements and measurement objects, eliminating the need for external testing equipment

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The sensing amplifiers are designed to perform multiple functions: they serve as reference measurement devices during trimming operations and as data sensing amplifiers during normal memory operations. This multi-functionality reduces the need for dedicated testing circuitry, improving die yield without increasing device complexity

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Reliability

If reference resistance variations occur due to process variations, then manufacturing remains simple, but read sensing margins decrease

Engineering Contradiction:
Improveread sensing marginVSAvoidreference resistance consistency
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The system measures the actual reference resistance of each reference cell using the sensing amplifier and compares it to an ideal reference value. Based on this feedback, the trimming circuit adjusts the reference resistance by switching parasitic resistors in parallel, creating a closed-loop system that compensates for process variations and improves read sensing margins

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The reference resistance value is made adjustable through the trimming circuit, which changes the resistance parameter by selectively switching parasitic resistors. This allows the reference resistance to be tuned to match ideal values despite process variations, improving manufacturing precision without complicating the manufacturing process

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS9455013B2System and method to trim reference levels in a resistive memory
Publication Date: 2016.09.27 QUALCOMM INC
  • US9455013B2 patent drawing
  • US9455013B2 patent drawing
  • US9455013B2 patent drawing

AI summary

A method includes, at a resistive memory device, determining an average effective reference resistance level based on a first effective reference resistance and a second effective reference resistance. The first effective reference resistance is based on a first set of reference cells of the resistive memory device and the second effective reference resistance is based on a second set of reference cells of the resistive memory device. The method includes trimming a reference resistance at least partially based on the average effective reference resistance level. Trimming the reference resistance includes, in response to determining that the first effective reference resistance is not substantially equal to the average effective reference resistance level, modifying one or more states of one or more magnetic tunnel junction devices associated with the first effective reference resistance.