Triode Packaging via Blind Hole Interconnections
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Traditional triode packaging methods result in large occupied space and low packaging efficiency, particularly in miniaturized electronic products.
Innovation Solution
A triode packaging method involving a carrier with a surface metal layer, where a chip is welded onto bonding pads, and blind holes are drilled and processed into metallic blind holes to form closed or non-closed circuit loops, using a composite material for plastic packaging, replacing traditional wire bonding.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If traditional wire bonding packaging method is used, then the triode can be packaged with conventional processes, but the occupied space is large and packaging efficiency is low
Solution Approach 1:
The patent transitions from planar wire bonding to three-dimensional blind hole interconnections, utilizing vertical space within the packaging substrate to route signals. This dimensional change allows for more compact layouts and reduced occupied space while maintaining electrical connectivity.
Solution Approach 2:
The patent embeds blind holes and metallic structures within the packaging substrate layers, creating a nested configuration where interconnection elements are contained within the substrate volume rather than occupying external space. This nesting approach reduces the overall packaging footprint.
2Ease of manufacture
If traditional wire bonding packaging method is used, then conventional packaging processes can be applied, but the packaging process is complex and time-consuming
Solution Approach 1:
The patent incorporates blind holes and metallic interconnection structures into the packaging substrate during substrate fabrication, before the actual device packaging occurs. This preliminary preparation eliminates the need for time-consuming wire bonding operations and simplifies the final packaging process.
Solution Approach 2:
The patent combines the interconnection structure fabrication with the substrate manufacturing process, merging multiple steps into a single integrated workflow. This consolidation reduces the total number of packaging operations and decreases overall packaging time.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method reduces the occupied space and increases packaging efficiency by simplifying the process and improving integration, resulting in a smaller triode with enhanced packaging efficiency.
Implementation Method 1
electroplating a non-circuit pattern region of the surface metal layer, to form at least one first bonding pad
Implementation Method 2
welding a chip on the at least one first bonding pad
Implementation Method 3
processing the blind holes into metallic blind holes
Data Source
AI summary
Disclosed are a triode packaging method and a triode. The method includes: providing a carrier, and covering at least one surface of the carrier with a surface metal layer; covering a circuit pattern region of the surface metal layer with a resist film; electroplating a non-circuit pattern region of the surface metal layer, to form at least one first bonding pad; welding a chip on the at least one first bonding pad; welding a second bonding pad on the chip to form a triode template; performing plastic packaging on the triode template by using a composite material; drilling blind holes in vertical directions of the second bonding pad and the at least one first bonding pad, and processing the blind holes into metallic blind holes; and performing pattern fabrication on the metallic blind holes to form a closed-circuit loop or a non-closed-circuit loop, and obtaining a triode through packaging.