Tri-Layer Photoresist Patterning for Fine-Pitch Semiconductor Devices

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Solution Overview

Problem

As semiconductor devices undergo miniaturization, existing patterning processes face challenges such as scum formation, line bridging, increased line width roughness, and reduced etching windows, leading to defects and decreased yield in fine-pitched semiconductor structures.

Innovation Solution

A tri-layer photoresist process is employed, including a bottom anti-reflective coating, a first hard mask layer, and a photoresist layer, followed by the deposition of a second hard mask layer using atomic layer deposition or chemical vapor deposition, which provides higher etch selectivity and prevents scum formation, allowing for precise patterning and reduced critical dimensions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If minimum feature size is reduced to improve integration density, then more components can be integrated into a given area, but scum formation and line bridging occur leading to defects

Engineering Contradiction:
Improveintegration densityVSAvoiddefect rate
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

The photoresist layer is divided into multiple layers (first photoresist layer and second photoresist layer) with different materials and properties. The first layer provides good patterning at larger dimensions while the second layer enables precise patterning at smaller dimensions, allowing the system to achieve high integration density without the defects associated with single-layer photoresist at reduced feature sizes.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent changes the material composition and thickness parameters of the photoresist layers. The first photoresist layer has specific material properties optimized for initial patterning, while the second layer has different properties (such as different glass transition temperature or etch selectivity) optimized for fine-pitched structure formation, enabling reliable patterning across different feature size ranges.

Inventive Principle:
Principle #35Parameter changes

2Device complexity

If single-layer photoresist is used to simplify the process, then manufacturing complexity is reduced, but scum formation and line bridging occur

Engineering Contradiction:
Improvepatterning processVSAvoidyield
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patterning process is segmented into distinct steps with different photoresist layers serving different functions. The first layer handles the initial patterning and provides structural support, while the second layer performs the precise pattern transfer. This segmentation prevents scum formation and line bridging that occur in single-layer processes, thereby improving yield despite the increased process complexity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent uses composite photoresist structures with two different photoresist materials having complementary properties. The first material provides good adhesion and structural integrity, while the second material provides excellent etch selectivity and pattern definition. This composite approach prevents the defects of single-material photoresist while maintaining processability.

Inventive Principle:
Principle #40Composite materials

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach reduces device feature critical dimensions, decreases line width roughness, increases the etching window, and enhances the yield of fine-pitched semiconductor structures by preventing scum and line bridging, thereby improving the overall manufacturing process.

Implementation Method 1

The photoresist layer may be exposed to an extreme ultraviolet (EUV) light source and developed to form openings in the photoresist layer

Methodology Applied
Scientific EffectPhotoresist exposure: Photopolymerisation

Implementation Method 2

A second hard mask layer may be formed in the openings and over the remaining portions of the photoresist layer by a process such as atomic layer deposition (ALD)

Methodology Applied
Scientific EffectAtomic layer deposition: Chemical Vapour Deposition

Implementation Method 3

A second hard mask layer may be formed in the openings and over the remaining portions of the photoresist layer by a process such as atomic layer deposition (ALD), chemical vapor deposition (CVD)

Methodology Applied
Scientific EffectChemical vapor deposition: Chemical Vapour Deposition

Data Source

PatentUS10867794B2Patterning method for semiconductor devices and structures resulting therefrom
Publication Date: 2020.12.15 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US10867794B2 patent drawing
  • US10867794B2 patent drawing
  • US10867794B2 patent drawing

AI summary

A hard mask formed over a patterned photoresist layer in a tri-layer photoresist and a method for patterning a target layer using the same are disclosed. In an embodiment, a method includes depositing a photoresist layer over a first hard mask layer; patterning the photoresist layer to form a plurality of openings in the photoresist layer; depositing a second hard mask layer over the photoresist layer, the second hard mask layer filling the plurality of openings, the second hard mask layer having a first etch selectivity relative to the first hard mask layer, the photoresist layer having a second etch selectivity relative to the first hard mask layer, the first etch selectivity being greater than the second etch selectivity; planarizing the second hard mask layer; removing the photoresist layer; and etching the first hard mask layer using the second hard mask layer as a mask.