Integrated Circuit Triple Gate Oxide Power Supply Sharing

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Solution Overview

Problem

Triple gate oxide chips require separate power supply voltages for high performance and low standby power consumption circuits, leading to conflicts when sharing a common power supply, particularly affecting static random access memory (SRAM) cells.

Innovation Solution

An integrated circuit design where core circuits with different gate dielectric thicknesses share a common power supply voltage, utilizing a voltage generator to produce varying voltages for SRAM cells, ensuring adequate read and write margins without increasing power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If gate oxide thickness is reduced to increase device speed, then performance is improved, but leakage current increases tremendously causing high standby power consumption

Engineering Contradiction:
Improvedevice speedVSAvoidstandby power consumption
Core Design Contradiction:
SpeedVSLoss of energy

Solution Approach 1:

The patent applies local quality by implementing different gate oxide thicknesses in different regions of the same chip. High-performance circuits use thin gate oxides (e.g., 50 angstroms or less) to achieve high speed, while low-power circuits use thick gate oxides to minimize leakage current and standby power consumption. This spatial differentiation allows each circuit region to have optimized characteristics for its specific function.

Inventive Principle:
Principle #3Local quality

2Speed

If separate power supply voltages are used for high performance and low power consumption circuits, then circuit performance is improved, but device complexity increases due to triple power supplies requirement

Engineering Contradiction:
Improvecircuit performanceVSAvoidpower supply complexity
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The patent merges the power supply systems by allowing multiple core circuits with different gate oxide thicknesses to share a common power supply voltage. Instead of requiring separate power supplies for high-performance and low-power circuits, the invention enables them to operate from the same power supply, thereby reducing the number of power supply lines and simplifying the overall device architecture.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The common power supply voltage serves multiple functions by simultaneously powering both high-performance circuits (with thin gate oxides) and low-power circuits (with thick gate oxides). This universal power supply approach eliminates the need for circuit-specific power supplies and reduces system complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Device complexity

If common power supply voltage is used for both high performance and low standby power consumption circuits, then power supply complexity is reduced, but SRAM cells in low power circuits cannot function correctly due to inadequate read and write margins

Engineering Contradiction:
Improvepower supply complexityVSAvoidSRAM cell functionality
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent applies local quality by optimizing SRAM cell design parameters specifically for low-power circuits that use thick gate oxides and operate from a common power supply voltage. This may include adjusting cell dimensions, transistor sizing, or layout configurations to ensure adequate read and write margins while maintaining compatibility with the shared power supply.

Inventive Principle:
Principle #3Local quality

4Reliability

If power supply voltage is increased to allow low standby power consumption circuits to work correctly, then SRAM cell reliability is improved, but power consumption on high performance circuits is undesirably increased

Engineering Contradiction:
ImproveSRAM cell functionalityVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent applies local quality by optimizing SRAM cell design parameters specifically for low-power circuits that use thick gate oxides and operate from a common power supply voltage. This may include adjusting cell dimensions, transistor sizing, or layout configurations to ensure adequate read and write margins while maintaining compatibility with the shared power supply.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS7529117B2Design solutions for integrated circuits with triple gate oxides
Publication Date: 2009.05.05 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US7529117B2 patent drawing
  • US7529117B2 patent drawing
  • US7529117B2 patent drawing

AI summary

An integrated circuit includes a first core circuit and a second core circuits. The first core circuit includes a first MOS device, wherein a first gate dielectric of the first MOS device has a first thickness. The second core circuit includes a second MOS device, wherein a second gate dielectric of the second MOS device has a second thickness less than the first thickness. A first power supply line having a first power supply voltage is connected to the first and the second core circuits a first power supply voltage.