Triple-gate PHEMT for Multi-band Switch Isolation
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Solution Overview
Problem
Multi-band communication devices face challenges in isolating transmit signals from receive signals due to overlapping frequency bands, leading to impaired receiver performance and high IMD3 levels, which existing PHEMT switches fail to address effectively, especially in terms of linearity and physical size.
Innovation Solution
A compact low loss switch using a three-gate PHEMT design with modified gate electrode fingers terminating within the active region, coupled with effective resistors to ensure even voltage division across gates, reducing floating gate voltages and IMD3 harmonics, implemented in hardware or a combination of hardware and software for precise control.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional PHEMT switches are used for multi-band communication, then the device can operate over multiple communication bands, but the transmit signal cannot be effectively isolated from the receive signal due to overlapping frequency bands, resulting in high IMD3 levels and impaired receiver performance
Solution Approach 1:
The patent segments the gate control into three independent gates (first gate, second gate, third gate) that can be independently biased. This segmentation allows different gates to handle different frequency bands separately, improving isolation between transmit and receive signals across multiple bands while reducing intermodulation products by preventing simultaneous operation in overlapping bands.
Solution Approach 2:
The patent changes the biasing parameters of the three gates to optimize performance for different communication bands. By adjusting the bias voltages applied to each gate, the device can switch between different operating modes (transmit/receive) and frequency bands, achieving better signal isolation and lower IMD3 levels compared to conventional single-gate or dual-gate PHEMTs.
2Ease of operation
If the gate electrode fingers are extended beyond the active region, then the gate control is enhanced, but floating gate voltages increase causing higher IMD3 harmonics and degraded linearity
Solution Approach 1:
The patent extracts the problematic floating gate voltage effect by providing separate biasing paths for each gate. The third gate (meandering gate) is specifically designed to terminate within the active region rather than extending beyond it, eliminating the floating voltage effect that causes IMD3 harmonics while maintaining effective gate control through independent biasing.
Solution Approach 2:
The patent introduces an intermediary biasing network that applies specific voltages to each gate to control the channel conductivity. The separate biasing of the three gates acts as an intermediary mechanism to achieve the desired gate control without allowing floating voltages to develop, thereby reducing IMD3 harmonics while maintaining operational effectiveness.
3Reliability
If multiple switching elements are used to achieve good isolation, then the signal isolation improves, but the physical size of the switching circuitry increases
Solution Approach 1:
The patent merges the functions of multiple switching elements into a single triple-gate PHEMT device. The three gates work together within one transistor structure to provide the isolation functionality that would otherwise require multiple separate switching elements, thereby achieving good signal isolation while minimizing the physical size of the switching circuitry.
Solution Approach 2:
The triple-gate PHEMT structure provides multi-functionality within a single device, enabling it to handle multiple communication bands and perform both transmit and receive switching functions. This universal design eliminates the need for multiple dedicated switching elements for different bands, reducing the overall switching circuitry area while maintaining isolation performance.
Data Source
AI summary
A switch element includes a source having a plurality of source fingers and a drain having a plurality of drain fingers interleaved with the source fingers. An active mesa region is defined between at least one of the plurality of source fingers and an adjacent at least one of the plurality of drain fingers. A plurality of gates are disposed between the at least one of the plurality of source fingers and the adjacent at least one of the plurality of drain fingers. At least one of gates extends into the active mesa region from outside of the active mesa region and terminates within the active mesa region.