Triple-Layer EPI Stack for Low Contact Resistance in FinFETs

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Solution Overview

Problem

FinFET devices in advanced technology nodes face high contact resistance due to low solubility of boron in high germanium content materials, making it challenging to achieve low contact resistance and integration with conventional annealing techniques.

Innovation Solution

A triple-layer epitaxial (EPI) stack comprising silicon germanium (SiGe), germanium (Ge), and silicon (Si) layers is formed, with gallium (Ga) confined within the Ge layer, allowing for superior solid solubility and reduced contact resistance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If boron (B) dopant is used in high germanium content materials, then the doping process is compatible with conventional annealing techniques, but the contact resistance increases due to low solubility of boron

Engineering Contradiction:

Improvecontact resistanceVSAvoiddopant solubility

Core Design Contradiction:

ReliabilityVSQuantity of substance

Solution Approach 1:

The patent changes the dopant type from boron to gallium, fundamentally altering the chemical parameter to achieve superior solubility in high Ge concentration materials. This parameter change enables highly active acceptor doping with Ga concentrations reaching 10^20 atoms/cm³, directly reducing contact resistance to below 10 ohm-millimeter

Inventive Principle:

Principle #35Parameter changes

Solution Approach 2:

The patent employs a triple-layer EPI stack structure combining SiGe, Ge, and Si layers. This composite material approach allows Ga to be confined in the Ge layer where it achieves maximum solubility, while the SiGe and Si layers provide structural support and compatibility with conventional processing

Inventive Principle:

Principle #40Composite materials

2Quantity of substance

If gallium (Ga) is used to replace boron for reducing contact resistance, then the solubility in high Ge concentration materials improves, but the integration becomes challenging due to incompatibility with conventional annealing techniques and gouging into SiGe EPI

Engineering Contradiction:

Improvedopant solubilityVSAvoidintegration complexity

Core Design Contradiction:

Quantity of substanceVSEase of manufacture

Solution Approach 1:

The patent segments the EPI structure into three distinct layers: SiGe layer, Ge layer, and Si layer. The Ga dopant is confined specifically to the Ge layer, separating the doping function from the structural layers. This segmentation allows Ga to achieve high solubility in Ge while the SiGe and Si layers protect against gouging and provide processing compatibility

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The triple-layer EPI stack acts as an intermediary structure that mediates between the requirements for high Ga solubility and compatibility with conventional annealing techniques. The SiGe and Si layers serve as protective intermediaries that prevent direct Ga-SiGe interaction that would cause gouging, while allowing the Ga-doped Ge layer to achieve low contact resistance

Inventive Principle:

Principle #24Intermediary (Mediator)

3Reliability

If high germanium concentration is increased to improve Ga solubility, then the contact resistance decreases, but the gouging into SiGe EPI increases

Engineering Contradiction:

Improvecontact resistanceVSAvoidgouging damage

Core Design Contradiction:

ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent applies local quality by creating a Ge layer with high Ge concentration (50-100%) specifically in the region where Ga doping is required. This localized high Ge concentration area provides maximum Ga solubility and low contact resistance, while the SiGe and Si layers maintain lower Ge concentrations to prevent gouging during processing

Inventive Principle:

Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The triple-layer EPI stack achieves ultra-low contact resistance, reduces integration complexity, and prevents gouging, enabling highly active acceptor doping and precise metal-semiconductor interfaces, suitable for FinFET devices beyond the 7 nm technology node.

Implementation Method 1

A triple-layer epitaxial (EPI) stack comprising silicon germanium (SiGe), germanium (Ge), and silicon (Si) layers is formed, with gallium (Ga) confined within the Ge layer

Methodology Applied

Scientific EffectEpitaxy: Epitaxy

Data Source

PatentUS10886178B2Device with highly active acceptor doping and method of production thereof

Publication Date: 2021.01.05 GLOBALFOUNDRIES US INC

AI summary

A device including a triple-layer EPI stack including SiGe, Ge, and Si, respectively, with Ga confined therein, and method of production thereof. Embodiments include an EPI stack including a SiGe layer, a Ge layer, and a Si layer over a plurality of fins, the EPI stack positioned between and over a portion of sidewall spacers, wherein the Si layer is a top layer capping the Ge layer, and wherein the Ge layer is a middle layer capping the SiGe layer underneath; and a Ga layer in a portion of the Ge layer between the SiGe layer and the Si layer.