Triple Line Buffer Resizer for Fractional Vertical Upscaling
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Solution Overview
Problem
Existing imaging devices face performance constraints during image up-scaling, particularly when the vertical up-scale ratio is a fraction, leading to irregular output patterns and reduced input data rates, which affect the overall efficiency and speed of image processing.
Innovation Solution
A resizer system incorporating a triple line buffer operating as a circular buffer, which replicates pixel data to achieve maximum input data rates and prevent overflow conditions, even with fractional vertical up-scale ratios, by synchronizing the output of multiple rescaler engines and utilizing a pixel input synchronizer logic to ensure synchronized data fetching.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If the resizer uses a conventional buffering approach with fractional vertical up-scale ratio, then the output pattern becomes irregular, but the input data rate is reduced below maximum theoretical rate
Solution Approach 1:
The patent applies dynamics by making the buffer depth adaptive rather than fixed. The buffer depth is dynamically adjusted based on the vertical up-scale ratio, allowing the system to handle both integer and fractional ratios efficiently. This dynamic adjustment enables the resizer to maintain regular output patterns while operating at maximum input data rates regardless of the up-scale ratio used.
Solution Approach 2:
The patent changes the buffer depth parameter based on the vertical up-scale ratio. By calculating the appropriate buffer depth as a function of the up-scale ratio, the system can accommodate fractional ratios without causing overflow or underflow conditions. This parameter change allows the resizer to maintain both regular output patterns and maximum input data rates.
2Reliability
If the resizer increases buffer depth to handle fractional vertical up-scale ratios, then overflow is prevented, but memory usage and device complexity increase
Solution Approach 1:
The patent optimizes the buffer depth parameter to be exactly what is needed for the given vertical up-scale ratio. Rather than using excessive buffer depth, the system calculates the minimum required depth to prevent overflow while handling fractional ratios. This optimized parameter setting prevents overflow conditions without unnecessarily increasing memory usage or device complexity.
3Productivity
If the resizer operates at maximum input data rate with fractional vertical up-scale ratio, then processing speed is maximized, but buffer overflow occurs
Solution Approach 1:
The patent uses dynamic buffer depth adjustment to reconcile maximum processing speed with overflow prevention. By adapting the buffer depth to the specific vertical up-scale ratio being used, the system can operate at maximum input data rates while maintaining reliable overflow-free operation. The dynamic nature of the buffer depth allows it to accommodate the variable data flow patterns introduced by fractional up-scale ratios.
Data Source
AI summary
An example embodiment provides a resizer in an image processing system. The resizer includes a receiving module that receives pixel data representative of an image. A triple line buffer is coupled to the receiving module that stores the pixel data in response to a write control signal from control logic. The triple line buffer is operated as a circular buffer. The resizer further includes a resizer core that reads pixel data from the triple line buffer in response to a read control signal from the control logic. The pixel data is replicated to up-scale the image vertically according to a vertical up-scale ratio such that the resizer achieves a maximum input data rate and also eliminates an overflow condition in the resizer. The vertical up-scale ratio is a fraction.