Triple-Sided Module Layout for Smaller High-Density Packaging
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional semiconductor packages face bottlenecks in module size reduction due to flip-chip dies and passive components on the top side of the PCB, limiting compute capability, memory capacity, and bandwidth, while module height is constrained by component height and PCB layer limitations.
Innovation Solution
A triple-sided semiconductor module design that utilizes two substrates with three surfaces for die placement, incorporating redistribution layers (RDL) to replace PCB layers for height reduction, and employs exposed die+PCB cavities for further reduction, allowing flexible die placement and area optimization.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If flip-chip dies and passive components are placed on the top side of the PCB, then compute capability and memory capacity increase, but module size in x- and y-directions increases
Solution Approach 1:
The patent transitions from conventional two-sided PCB mounting to triple-sided module architecture, utilizing the third dimension (z-direction) by stacking substrates vertically. This allows components to be distributed across three substrate surfaces, reducing the footprint area while maintaining or increasing component density and compute capability.
Solution Approach 2:
The module is divided into multiple substrates (first substrate, second substrate, third substrate) that can be manufactured and assembled separately. This segmentation enables independent optimization of each substrate layer and facilitates the triple-sided configuration, allowing compute capability to scale without proportionally increasing module area.
2Quantity of substance
If component height on the top side is increased to accommodate more components, then compute capability increases, but module height in z-direction increases
Solution Approach 1:
Instead of increasing component height vertically on a single layer, the patent distributes components across three stacked substrate layers. This transforms the vertical stacking problem into a horizontal layering solution, maintaining compact module height while achieving higher compute capability through increased component count across layers.
Solution Approach 2:
Multiple substrate layers are nested vertically, with each substrate containing components and interconnection layers. This nested configuration allows compute capability to scale by adding substrate layers rather than increasing the height of individual components, thereby controlling overall module height.
3Reliability
If PCB layer counts are increased to provide more routing and ground layers, then signal integrity improves, but module height in z-direction increases
Solution Approach 1:
The routing and ground layer functionality is segmented across multiple substrate units rather than requiring excessive layers within a single PCB. Each substrate can provide its own routing and grounding, reducing the need for high layer counts in individual layers while maintaining signal integrity through the distributed multi-layer architecture.
Solution Approach 2:
Redistribution layers (RDL) serve as intermediaries between different substrate layers, providing efficient signal routing and grounding connections without requiring excessive PCB layer thickness. These RDLs enable signal integrity to be maintained across the triple-sided structure with controlled module height.
Data Source
AI summary
An apparatus includes a first substrate comprising one or more first interconnection layers, wherein a first die is coupled to a first side of the first substrate, and a second substrate comprising one or more second interconnection layers. The second die may be coupled to a first side of the second substrate, and a third die is coupled to a second side of the second substrate. The first substrate and the second substrate may be stacked together.