Triple-Well Isolated Diode Structure for Leakage Suppression

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Solution Overview

Problem

Conventional boost converter circuits with twin well diodes suffer from significant current leakage due to parasitic bipolar junction transistors, leading to reduced efficiency and limited power output, especially at high voltages.

Innovation Solution

The implementation of a triple well isolated diode structure within the boost converter circuit, which includes a substrate, buried layer, epitaxially grown layer, and multiple wells with specific conductivity types and dopant concentrations, along with isolation features and contact regions, reduces parasitic BJT formation and substrate current leakage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Strength

If a twin well diode structure is used to provide higher breakdown voltage, then the voltage handling capability is improved, but parasitic BJT formation occurs causing significant current leakage

Engineering Contradiction:
Improvebreakdown voltageVSAvoidcurrent leakage
Core Design Contradiction:
StrengthVSLoss of energy

Solution Approach 1:

The patent divides the single substrate into multiple isolated wells (first well, second well, third well) with different conductivity types. Each well is electrically isolated from the substrate through isolation structures, segmenting the current paths and preventing the formation of a continuous parasitic BJT channel that would cause leakage to ground.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Isolation structures (such as isolation oxides or isolation trenches) are introduced as intermediary elements between the wells and the substrate. These isolation structures act as mediators that block the electrical connection between the wells and the substrate, thereby preventing parasitic BJT leakage currents while maintaining the high voltage blocking capability.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Strength

If twin well diode is used in boost converter circuit, then higher breakdown voltage is achieved, but circuit efficiency is reduced due to current leakage

Engineering Contradiction:
Improvebreakdown voltageVSAvoidcircuit efficiency
Core Design Contradiction:
StrengthVSProductivity

Solution Approach 1:

The triple well isolated diode structure segments the electrical paths by creating isolated regions with different conductivity types. This segmentation prevents the formation of parasitic BJT leakage channels, thereby maintaining high circuit efficiency while still providing the necessary high breakdown voltage capability for boost converter operation.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different regions (wells) are doped with different conductivity types (n-type, p-type) to create locally optimized electrical properties. The first well, second well, and third well each have specific conductivity types arranged to block parasitic BJT formation in their respective regions, improving overall circuit efficiency without compromising voltage handling.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This design significantly reduces substrate current leakage to less than 1%, enhancing the efficiency and power handling capabilities of the boost converter circuit, allowing for higher output voltages and reduced power consumption, while maintaining low leakage across a wide range of turn on voltages without additional circuitry.

Implementation Method 1

an epitaxially grown layer (epi-layer) having a first type of conductivity

Methodology Applied
Scientific EffectEpitaxial growth: Epitaxy

Data Source

PatentUS20240371966A1Mehtod of making triple well isolated diode and triple well isolated diode
Publication Date: 2024.11.07 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20240371966A1 patent drawing
  • US20240371966A1 patent drawing
  • US20240371966A1 patent drawing

AI summary

A method of making a triple well isolated diode includes growing an epi-layer over a substrate. The method further includes forming a first isolation feature in the epi layer. The method includes implanting a first well in the epi-layer. The method further includes implanting a second well in the epi-layer, wherein a first isolation feature separates a portion of the second well from a portion of the first well. The method further includes implanting a third well in the epi-layer, wherein a sidewall of third well contacts a sidewall of the second well. The method further includes implanting a deep well in the epi-layer, wherein the deep well extends beneath the first well, the deep well extends underneath a first portion of the second well, and a second portion of the second well extends beyond the deep well in a first direction parallel to a top surface of the substrate.