Concurrent Multi-State Memory Programming via Triple-Well Voltage Generation
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current flash memory technologies face challenges in programming multiple states efficiently, as increasing the number of states per memory cell leads to longer programming times, especially when using triple-well technology to generate negative voltages for concurrent programming.
Innovation Solution
Concurrently programming memory cells by applying non-negative and negative voltages to respective bit lines using triple-well technology, allowing the same programming pulse to program cells to different states, and incorporating quick pass write operations to optimize voltage levels for faster programming.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the number of states that can be programmed into a memory cell is increased, then the data storage capacity is improved, but the programming time increases
Solution Approach 1:
The patent segments the programming process by dividing memory cells into different groups that receive different voltage levels simultaneously. Specifically, it applies first voltage levels to first memory cells and second voltage levels to second memory cells in parallel, allowing multiple states to be programmed concurrently rather than sequentially, thus reducing total programming time while maintaining high storage capacity
Solution Approach 2:
The patent dynamically adjusts voltage levels applied to different memory cell groups during the programming process. By varying voltage levels across different cell groups simultaneously and adapting the programming scheme based on cell state requirements, the system achieves faster concurrent programming of multiple states without compromising programming precision
2Productivity
If triple-well technology is used to generate negative voltages for concurrent programming, then the programming speed is improved, but the device complexity increases
Solution Approach 1:
The patent employs triple-well technology that enables memory cells to generate their own negative voltages through the well structures integrated into the memory cell design. This self-service mechanism eliminates the need for separate external voltage generation circuits, thereby achieving fast concurrent programming while minimizing additional device complexity
Solution Approach 2:
The triple-well structures serve multiple functions: they act as both the memory cell storage element and the negative voltage generation mechanism. This multi-functionality allows the same structure to provide both data storage and voltage generation capabilities, improving programming speed without proportionally increasing device complexity
Data Source
AI summary
A method of concurrently programming a memory. Various methods include: applying a non-negative voltage on a first bit line coupled to a first memory cell; applying a negative voltage on a second bit line coupled to a second memory cell, where the negative voltage is generated using triple-well technology; then applying a programming pulse to the first and second memory cells concurrently; and in response, programming the first and second memory cells to different states. The methods also include applying a quick pass write operation to the first and second memory cells, by: applying a quick pass write voltage to the first bit line coupled to the first memory cell, where the quick pass write voltage is higher than the non-negative voltage; applying a negative quick pass write voltage to the second bit line coupled to the first memory cell, where the negative quick pass write voltage is generated using triple-well technology.