True Random Number Generation Using Linear Feedback Shift Register

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Solution Overview

Problem

True random number generation devices face challenges in generating unpredictable numbers with multiple bits due to high power consumption and layout space requirements, as existing true random number generation devices are primarily based on analog circuits and require more stages for higher bit lengths.

Innovation Solution

A true random number generation device incorporating a selection signal providing circuit and a linear feedback shift register with multiple stages, where each stage generates output logic values based on a clock signal and the previous bit's true random number, with one value selected by a true random selection signal to produce unpredictable true random numbers, reducing the need for multiple-bit true random selection signals and optimizing layout and power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If multiple true random number generation devices are used to generate true random numbers of multiple bits, then the unpredictability of true random numbers is improved, but the layout space occupied by the device increases

Engineering Contradiction:
Improveunpredictability of true random numbersVSAvoidlayout space of device
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent combines multiple true random number generation stages into a single integrated device. The linear feedback shift register integrates multiple stages that work together to generate multi-bit true random numbers, merging the functionality of what would traditionally require separate devices into one unified structure.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The device is divided into multiple stages within the linear feedback shift register, where each stage processes one bit of the true random number. This segmentation allows the device to generate multi-bit output while maintaining a compact structure, as each stage is a modular component that can be efficiently arranged.

Inventive Principle:
Principle #1Segmentation

2Reliability

If multiple true random number generation devices are used to generate true random numbers of multiple bits, then the quality of true random numbers is improved, but the power consumption increases

Engineering Contradiction:
Improvequality of true random numbersVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by stationary object

Solution Approach 1:

The patent merges multiple generation stages into a single device with shared control logic and clocking mechanisms. The linear feedback shift register structure allows multiple stages to operate cooperatively with reduced overhead compared to separate devices, lowering total power consumption while maintaining quality.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The linear feedback shift register serves multiple functions simultaneously: it generates true random numbers, provides feedback loops for multiple stages, and controls the selection process. This multi-functionality reduces the need for separate dedicated circuits for each bit generation, thereby reducing overall power consumption.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Reliability

If a true random number generation device based on analog circuit is used, then the generation of unpredictable true random numbers is achieved, but the power consumption in operation increases

Engineering Contradiction:
Improvegeneration of unpredictable true random numbersVSAvoidpower consumption in operation
Core Design Contradiction:
ReliabilityVSUse of energy by stationary object

Solution Approach 1:

The patent replaces traditional analog circuit mechanisms with a digital implementation using a linear feedback shift register. This substitution maintains the ability to generate unpredictable true random numbers while reducing power consumption through more efficient digital logic operations and reduced analog signal processing requirements.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

4Productivity

If a true random number generation device is used to generate true random numbers of multiple bits, then the quantity of true random numbers is improved, but the device complexity increases

Engineering Contradiction:
Improvequantity of true random numbersVSAvoiddevice complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The device is segmented into multiple stages within the linear feedback shift register, with each stage responsible for generating one bit. This modular segmentation allows the device to produce multi-bit output systematically while keeping each individual stage relatively simple, managing overall complexity through structured division of labor.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The linear feedback shift register structure provides universal functionality for generating multiple bits through a unified mechanism. The same basic structure and operation mode apply to each stage, allowing the device to scale to multiple bits without proportionally increasing complexity, as the pattern repeats efficiently across stages.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS10776079B2True random number generation device and generation method thereof
Publication Date: 2020.09.15 WINBOND ELECTRONICS CORP
  • US10776079B2 patent drawing
  • US10776079B2 patent drawing
  • US10776079B2 patent drawing

AI summary

A true random number generation device and a true random number generation method are provided. The true random number generation device includes a selection signal providing circuit and a linear feedback shift register. The selection signal providing circuit is configured to provide a true random selection signal. The linear feedback shift register includes true random number generators of a plurality of stages. The Nth stage true random number generator is configured to receive a clock signal and a N−1th bit true random number. The Nth stage true random number generator generates a plurality of Nth stage output logic values according to the clock signal and the N−1th bit true random number, and selects one of the plurality of Nth stage output logic values to be a Nth bit true random number according to the true random selection signal.