Trusted Monotonic Counter Memory Split for Replay Attack Resistance
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Solution Overview
Problem
Systems-on-Chip (SoCs) with limited internal non-volatile memory face challenges in storing a high number of unique monotonic counter values, which are essential for ensuring data freshness and preventing replay attacks, while external memory access introduces security risks.
Innovation Solution
A Trusted Monotonic Counter (TMC) system that efficiently uses internal and external non-volatile memory by splitting the counter value into a base value stored externally and an offset value stored in limited internal OTP memory, with mechanisms for power cycle resilience and secure updates, ensuring unique numbers are generated without repeating values.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If monotonic counter values are stored in external non-volatile memory, then the maximum counter value capacity is improved, but security risks increase due to external memory access
Solution Approach 1:
The monotonic counter is segmented into two parts: a base value stored in secure internal non-volatile memory and an offset value stored in external non-volatile memory. This segmentation allows the system to maintain high counter value capacity through external memory while preserving security through internal memory, as the secure base value cannot be easily manipulated by external attackers.
2Object-affected harmful factors
If all counter values are stored in internal non-volatile memory, then security is improved, but the maximum counter value capacity is limited
Solution Approach 1:
The counter is divided into a base value component stored securely in internal memory and an offset value component stored in external memory. The base value determines the secure foundation while the offset value extends the total counter capacity, allowing the system to overcome internal memory limitations without compromising security.
Solution Approach 2:
The base value stored in secure internal memory acts as an intermediary that protects the overall counter system. Even though the offset value in external memory can be accessed and modified, the secure base value ensures that the complete counter value (base + offset) maintains its integrity and security properties.
3Object-affected harmful factors
If the counter is updated frequently to prevent replay attacks, then security is improved, but the internal memory write cycles are increased
Solution Approach 1:
By segmenting the counter into base and offset values stored in different memory locations, the system can update the offset value in external memory without writing to the secure internal memory. This reduces wear on internal non-volatile memory while maintaining the ability to prevent replay attacks through frequent counter updates.
Solution Approach 2:
The system applies different update frequencies to different parts of the counter: the base value in internal memory is updated less frequently to preserve memory lifespan, while the offset value in external memory can be updated more frequently to maintain security against replay attacks.
4Device complexity
If the base value and offset value are both stored in external memory, then memory usage is simplified, but security is compromised
Solution Approach 1:
The system segments the storage locations based on security requirements: the base value requiring high security is stored in internal non-volatile memory, while the offset value with lower security requirements is stored in external memory. This segmentation balances security needs with storage management simplicity.
Data Source
AI summary
A device, including: an unsecure non-volatile memory; a secure device including: a processor; and a secure non-volatile memory; wherein the secure device is configured to: calculate a TMC value from an offset and a base value; store a TMC version value in the secure non-volatile memory and the insecure non-volatile memory, wherein the TMC version value is updated when TMC value is incremented the first time after the secure device is powered up; store the base value in the unsecure non-volatile memory; store the offset value in the unsecure non-volatile memory when the secure device is in a system power down state; store the offset value in the secure non-volatile memory when the secure device is in a rescue state; and store a TMC link value in the unsecure memory, wherein the TMC link value is based upon the base value and TMC version value stored in the unsecure memory.


