Trusted Guard Processor for Legacy System Message Filtering
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Solution Overview
Problem
In multi-system communication environments, existing technologies face challenges in maintaining system stability and compatibility due to varying communication protocols, security requirements, and hardware upgrades, particularly in legacy systems that need to operate for decades, requiring efficient message filtering and encryption solutions that can adapt to changing security standards and communication speeds.
Innovation Solution
A trusted guard processor with custom hardware and state machine circuits is used to filter and translate message traffic between systems, employing dedicated hardware for message filtering and encryption, capable of processing high-speed communication and accommodating different security requirements, including NSA-certified encryption, to ensure compatibility and stability across diverse communication systems.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If legacy security hardware is used to maintain compatibility with old systems, then system compatibility is preserved, but the system cannot adapt to new security requirements and communication speeds
Solution Approach 1:
The system is divided into legacy security hardware components and a new trusted guard processor. The legacy hardware maintains compatibility with old systems while the trusted guard processor handles new security requirements, allowing the system to segment functionality between old and new components.
Solution Approach 2:
The trusted guard processor acts as an intermediary between legacy security hardware and new communication systems. It receives messages from legacy systems, applies new security requirements through filtering and encryption, and outputs compatible messages to new systems, thus mediating between incompatible technologies.
2Adaptability or versatility
If individual systems undergo upgrades to meet new requirements, then system adaptability improves, but system stability deteriorates due to patchwork array of fixes and upgrades
Solution Approach 1:
The trusted guard processor is designed as a universal interface that handles multiple communication protocols and security requirements through a single device. Instead of upgrading individual legacy systems, the trusted guard provides multi-functional protocol translation and security processing, stabilizing the overall system architecture.
Solution Approach 2:
The trusted guard processor serves as a stable intermediary layer between legacy and new systems. By centralizing protocol translation and security processing in this intermediate device, the patent prevents direct upgrades to legacy hardware, thereby maintaining system stability while achieving protocol compatibility.
3Speed
If message filtering and encryption are performed using general-purpose processors, then device complexity is reduced, but processing speed decreases
Solution Approach 1:
The message filtering and encryption functions are extracted from general-purpose processors and implemented as dedicated hardware circuits within the trusted guard processor. This extraction of critical functions to specialized hardware enables high-speed processing while managing complexity through modular circuit design.
Solution Approach 2:
The patent replaces software-based message filtering and encryption mechanisms with dedicated hardware circuits. This substitution of mechanical/software systems with specialized hardware implements high-speed processing by utilizing parallel hardware operations instead of sequential software execution.
Data Source
AI summary
A processor for filtering message traffic between communication systems may include an input buffer and an output buffer. The processor may also include a memory interface communicatively coupled to a filter rule table that includes message filter rules for verifying input messages received by the input buffer and build output message rules for constructing output messages based on the input messages received by the input buffer. The processor may additionally include a message filter state-machine circuit communicatively coupled to the input buffer that applies the message filter rules to the input message from the input buffer and determines whether the input message conforms to each of the message filter rules. The processor may further include a build output message state-machine circuit that constructs an output message based on the input message and causes the output message to be stored in the output buffer.


