Trusted I/O Attestation via Cryptographic Engine
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Solution Overview
Problem
Current processors, such as those with Intel SGX, provide secure enclaves for data protection within the chip but do not secure I/O data moving across the on-chip boundary, leaving it vulnerable to attacks.
Innovation Solution
A computing device with a cryptographic engine that encrypts and decrypts I/O data using channel IDs for DMA transactions, ensuring secure I/O operations by protecting data with trusted hardware and software entities through attestation and verification mechanisms.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If secure enclaves are used to protect data within the processor, then data confidentiality and integrity are improved, but I/O data moving across the on-chip boundary remains vulnerable to attacks
Solution Approach 1:
The patent segments the data protection mechanism by introducing separate cryptographic engines and attestation modules that specifically handle I/O data paths. The system divides protection into multiple layers: secure enclave protection for internal data, cryptographic engines for I/O data encryption, and attestation mechanisms for verifying the integrity of I/O data paths, thereby extending security coverage to previously vulnerable I/O boundaries
Solution Approach 2:
The patent introduces cryptographic engines as intermediary components between the secure enclaves and I/O devices. These engines act as mediators that encrypt and decrypt I/O data, preventing direct exposure of sensitive data on the I/O bus. The attestation mechanism also serves as an intermediary that verifies the trustworthiness of I/O data paths before data transmission, adding a security checkpoint in the data flow
2Reliability
If attestation and verification mechanisms are implemented for I/O operations, then security and data integrity are improved, but system complexity increases
Solution Approach 1:
The patent implements universal attestation mechanisms that can verify multiple types of I/O devices and data paths through a common framework. The cryptographic engines and attestation modules are designed to handle diverse I/O operations (memory access, device communication, data transmission) through standardized procedures, reducing the need for device-specific security implementations and managing complexity through consolidation
Solution Approach 2:
The patent performs attestation and verification actions before I/O data transmission occurs. The system pre-verify the integrity of I/O data paths, pre-establish cryptographic keys, and pre-validate device identities before actual data operations. This preliminary action prevents security issues during data transmission and simplifies the overall process by handling verification upfront rather than requiring continuous complex monitoring
Data Source
AI summary
Technologies for trusted I/O attestation and verification include a computing device with a cryptographic engine and one or more I/O controllers. The computing device collects hardware attestation information associated with statically attached hardware I/O components that are associated with a trusted I/O usage protected by the cryptographic engine. The computing device verifies the hardware attestation information and securely enumerates one or more dynamically attached hardware components in response to verification. The computing device collects software attestation information for trusted software components loaded during secure enumeration. The computing device verifies the software attestation information. The computing device may collect firmware attestation information for firmware loaded in the I/O controllers and verify the firmware attestation information. The computing device may collect application attestation information for a trusted application that uses the trusted I/O usage and verify the application attestation information. Other embodiments are described and claimed.