TSMP Modification Tracking with Timestep-Based Violation Checks

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Solution Overview

Problem

In shared memory multi-processors (SMP), particularly in timestep SMP (TSMP), the process of clearing metadata to avoid false violations between nodes writing to the same memory word takes approximately 8 milliseconds, severely limiting performance in applications like molecular dynamics simulations.

Innovation Solution

Implementing a home node with cache blocks, modification tracker entries, and timestep count entries to perform violation checks only when the configuration status register matches the timestep counter value, and resetting tracker entries only when the timestep counter wraps back to zero, thereby avoiding frequent metadata clearing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If metadata is cleared at each timestep to avoid false violations, then reliability is improved, but productivity deteriorates due to 8ms processing delay

Engineering Contradiction:
Improveviolation detection accuracyVSAvoidprocessing speed
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent segments the metadata clearing operation by introducing timestep count entries that divide the shared memory space into multiple timesteps. Instead of clearing all metadata at once, the system only clears metadata for the current timestep and retains metadata for future timesteps, enabling parallel processing and eliminating the 8ms delay while maintaining violation detection accuracy.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent performs preliminary action by pre-allocating timestep count entries and pre-establishing the metadata structure for multiple timesteps before processing begins. This allows the system to track modifications across timesteps without performing time-consuming clearing operations during actual processing, thus improving productivity while maintaining reliability.

Inventive Principle:
Principle #10Preliminary action

2Productivity

If metadata is retained across timesteps to avoid clearing delays, then productivity is improved, but reliability deteriorates due to false violations

Engineering Contradiction:
Improveprocessing speedVSAvoidviolation detection accuracy
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent introduces timestep count entries as an intermediary mechanism between the metadata and the violation detection logic. These entries store the timestep number associated with each metadata entry, allowing the system to determine whether a metadata entry is valid for the current timestep without clearing the metadata. This intermediary structure enables both high productivity and high reliability.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent changes the parameter tracking approach by adding timestep count information to each metadata entry. Instead of simply tracking whether a word was modified, the system now tracks which timestep the modification occurred in. This parameter change allows the system to retain metadata across timesteps while accurately determining validity, resolving the contradiction between productivity and reliability.

Inventive Principle:
Principle #35Parameter changes

3Measurement precision

If full metadata clearing is performed, then measurement precision is improved by avoiding false violations, but loss of time increases

Engineering Contradiction:
Improveviolation check accuracyVSAvoidmetadata clearing time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent extracts the essential information needed for violation detection (timestep count) from the metadata and stores it separately in timestep count entries. This extraction allows the system to retain the bulk of the metadata without clearing it, while still maintaining the ability to accurately detect violations by checking the extracted timestep information. This reduces the time lost to clearing operations while preserving measurement precision.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent introduces dynamic timestep management where the validity of metadata entries is determined by comparing their associated timestep counts with the current timestep. This dynamic approach replaces the static full-clearing mechanism with a selective validation process that maintains precision while minimizing time loss by only invalidating necessary metadata entries.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS12517847B2System and method of handling modification tracking data in timestep shared memory multi-processors (TSMP)
Publication Date: 2026.01.06 SAMSUNG ELECTRONICS CO LTD
  • US12517847B2 patent drawing
  • US12517847B2 patent drawing
  • US12517847B2 patent drawing

AI summary

A computer system including a home node having global shared memory and remote nodes configured to access the global shared memory. The home node contains a modification tracker entry and a timestep count entry associated with each cache block. The home node is configured to: set a timestep counter value in the timestep count entry; modify a word in one of the cache blocks in response to a first write operation from one of the remote nodes; set a first modification tracker value in response to the first write operation; modify a word in the one of the cache blocks in response to a second write operation from one of the remote nodes; set a second modification tracker value in response to the second write operation; and perform a violation check in response to a configuration status register value being equal to the timestep counter value.