TSN Clock Synchronization Attack Detection via Pseudo-Random Frames

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Solution Overview

Problem

Time-sensitive networking (TSN) systems are vulnerable to attacks that disrupt time synchronization, leading to misaligned communication windows and compromised safety in critical systems like autonomous vehicles and industrial operations.

Innovation Solution

Implementing synchronized pseudo-random number generators (PRNGs) at transmitting and receiving nodes to detect timing attacks by ensuring messages are transmitted and received within randomized time slots, using delay times and buffers based on PRNGs, thereby validating message timing and detecting misalignment.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If traditional time synchronization protocols are used in TSN systems, then communication between nodes is maintained, but the system becomes vulnerable to timing attacks that can disrupt synchronization and compromise safety

Engineering Contradiction:
Improvesynchronization integrityVSAvoidtiming attacks
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The system performs preliminary actions by generating pseudo-random delay values and communicating them to receiving nodes before actual message transmission. This allows receiving nodes to pre-calculate expected arrival time windows, enabling them to detect timing attacks by comparing actual arrivals against these pre-established expectations.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

Pseudo-random delay values serve as an intermediary mechanism between transmitting and receiving nodes. These delay values are communicated through a secure channel and act as a mediator that enables receiving nodes to validate timing without exposing the system to direct timing attack vectors.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If fixed time slots are used for message transmission in TSN, then deterministic data delivery is achieved, but the system cannot detect timing attacks that exploit predictable transmission patterns

Engineering Contradiction:
Improveattack detection capabilityVSAvoidsynchronization mechanism
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The system introduces dynamics by using pseudo-random delay values that change for each message transmission. This transforms the static, predictable time slot allocation into a dynamic system where transmission times vary according to pseudo-random patterns, making timing attacks ineffective while maintaining deterministic delivery within bounded windows.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system changes the parameter of transmission timing from fixed to pseudo-randomly variable. By modifying the time parameter dynamically based on pre-shared pseudo-random sequences, the system maintains deterministic delivery guarantees while introducing unpredictability that prevents timing attacks.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If pseudo-random delay values are implemented for each message, then timing attack detection is enabled, but communication overhead increases due to additional synchronization data

Engineering Contradiction:
Improvetiming validation accuracyVSAvoidsynchronization data
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

The system applies partial action by communicating only the necessary pseudo-random delay values through secure channels, rather than transmitting complete timing validation data. This minimizes the quantity of synchronization data exchanged while still enabling receiving nodes to perform comprehensive timing validation against expected arrival windows.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS12506742B2Detecting clock synchronization attacks with pseudo-randomization of frames in the protected window
Publication Date: 2025.12.23 INTEL CORP
  • US12506742B2 patent drawing
  • US12506742B2 patent drawing
  • US12506742B2 patent drawing

AI summary

Systems and methods to detect attacks on the clocks of devices in time sensitive networks are described. Particularly, the disclosed systems and methods provide detection and mitigation of timing synchronization attacks based on pseudo-random numbers generated and used to select and authenticate timing of transmission of messages in protected transmission windows.