Display Synchronization Using TSN Clock Drift Monitoring

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Solution Overview

Problem

Existing synchronization solutions for visual media applications, such as digital signage and video walls, face limitations in accuracy and scalability due to clock drift and network latency, particularly in hybrid methods that rely on PTP and HW clock tuning, which restrict the number of displays and introduce signal integrity issues.

Innovation Solution

The implementation of time-sensitive networking (TSN) and Precision Time Protocol (PTP) technologies to monitor and adjust display clock drift without broadcasting signaling over the network, achieving sub-nanosecond accuracy by synchronizing display clocks and eliminating latency-induced errors.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If SW-based sync solutions using PTP or NTP are used, then synchronization accuracy is improved, but the number of displays that can be connected is limited and physical distance between devices is restricted

Engineering Contradiction:
Improvesynchronization accuracyVSAvoidnumber of displays and physical distance
Core Design Contradiction:
Measurement precisionVSAdaptability or versatility

Solution Approach 1:

The patent introduces a dedicated sync processor as an intermediary component that handles synchronization tasks separately from the main display processing pipeline. This mediator collects timing information from multiple displays and coordinates synchronization signals without interfering with the display content processing, enabling accurate sync across many displays over long distances

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The synchronization function is segmented into independent components: a sync signal generator that creates timing signals, a distribution system that sends these signals to individual displays, and separate clock recovery circuits in each display. This segmentation allows each component to be optimized independently and scales to many displays

Inventive Principle:
Principle #1Segmentation

2Measurement precision

If HW-based sync solutions using switches and coax cables are used, then synchronization accuracy is improved, but the number of displays is limited to 16 screens and cable clutter is created

Engineering Contradiction:
Improvesynchronization accuracyVSAvoidcable clutter and number of displays
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent uses standard Ethernet ports and existing display controller hardware to perform synchronization functions that previously required specialized coaxial cables and dedicated sync hardware. The same network infrastructure used for data communication also carries synchronization signals, eliminating the need for separate sync cabling

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent replaces physical HW-based synchronization mechanisms (coaxial cables, discrete sync signals) with a software-based approach that uses network protocols to transmit timing information. This substitution eliminates the need for specialized physical infrastructure while maintaining or improving accuracy

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

3Measurement precision

If hybrid methods using PTP with HW display clock tuning are used, then synchronization accuracy is improved, but display clock drift is not corrected and network delay dominates timing errors

Engineering Contradiction:
Improvesynchronization accuracyVSAvoidclock drift correction and timing error
Core Design Contradiction:
Measurement precisionVSReliability

Solution Approach 1:

The patent implements a feedback mechanism where each display continuously monitors its own clock drift relative to the synchronized time and automatically adjusts its internal timing. The sync processor receives timing information from all displays and sends correction signals to keep all clocks synchronized, continuously compensating for drift and network delay variations

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent performs preliminary clock synchronization before actual display content is rendered. The sync processor establishes accurate timing relationships between all displays in advance and maintains these relationships throughout operation, ensuring that clock drift and network delays are corrected before they can cause timing errors in the displayed content

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS20230262281A1Display synchronization for time sensitive networking
Publication Date: 2023.08.17 INTEL CORP
  • US20230262281A1 patent drawing
  • US20230262281A1 patent drawing
  • US20230262281A1 patent drawing

AI summary

The present disclosure provides display network synchronization (sync) technologies and techniques using time-sensitive networking (TSN) and/or Precision Time Protocol (PTP) technologies. The display network sync mechanisms synchronize multiple display systems that are communicatively coupled together via a network. The display network sync mechanisms involve synchronizing the display systems with one another, synchronizing the various clocks and/or timers of each display system, monitoring clock drift of display clocks of individual display systems, and adjusting display signaling based on the monitored clock drift. The monitoring and adjusting of the display signaling can be accomplished without broadcasting the display signaling over the network connection.