TSSOP-8 Package Thermal Management via Segmented Die Pads
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing TSSOP-8 semiconductor packages face challenges in thermal performance due to heat generated within the package affecting the operation of MOSFETs and ICs, with MOSFETs designed for higher temperature ranges than ICs, leading to inadequate heat dissipation and thermal resistance.
Innovation Solution
The TSSOP-8 semiconductor package design features lead frame die pads spaced apart to increase encapsulant between devices, providing a thermal barrier, and fused leads for additional heat dissipation paths, along with increased source bonding areas to reduce heat generation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If MOSFETs and IC are bonded to the same lead frame pad, then device integration is achieved, but thermal performance deteriorates due to heat affecting IC operation
Solution Approach 1:
The lead frame pad is segmented into multiple separate pads (first lead frame pad for MOSFETs, second lead frame pad for IC). This segmentation allows thermal isolation between the high-power MOSFETs and the temperature-sensitive IC, resolving the contradiction by enabling both integration on the same package while preventing thermal interference through separate bonding locations.
2Area of stationary object
If lead frame pads are placed close together, then package size is reduced, but thermal dissipation deteriorates
Solution Approach 1:
The invention utilizes the lateral dimension of the lead frame by positioning die pads at opposite corners or edges of the lead frame structure. This dimensional arrangement maximizes the thermal dissipation path through the encapsulant material while maintaining a compact overall package footprint, effectively resolving the contradiction between small size and thermal performance.
3Temperature
If encapsulant volume is increased between die pads, then thermal barrier is improved, but device density decreases
Solution Approach 1:
The invention employs asymmetric placement of die pads at non-central locations on the lead frame (such as opposite corners), which naturally creates optimized thermal pathways through the encapsulant without requiring excessive encapsulant volume. This asymmetric configuration achieves effective thermal isolation while maintaining high device density within the package.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design achieves improved thermal performance by reducing the thermal resistance of MOSFETs and ICs, with lower temperatures achieved when applying heat, demonstrating enhanced heat dissipation and package efficiency.
Implementation Method 1
The first and second lead frame die pads are disposed a distance apart from one another to allow for an increased amount of encapsulant therebetween and to thereby provide for improved thermal performance of the package
Implementation Method 2
a pair of leads are fused to the first lead frame pad and a lead is fused to the second lead frame pad to provide for additional heat dissipation paths in the package
Data Source
AI summary
A composite semiconductor package is disclosed. The package includes a lead frame having first and second die bonding pads, the first and second die bonding pads having a large lateral separation therebetween, a first device bonded to the first die bonding pad, a second device bonded to the second die bonding pad, a plurality of first leads coupled to the first die bonding pad, a plurality of second leads coupled to the second die bonding pad, and an encapsulant covering the lead frame, the first and second devices and at least a portion of the first and second pluralities of leads. The package may be a TSSOP-8 composite package having a common drain MOSFET pair and an IC.