Transaction Specific Stage-Wise Log Data Capture for Verification
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Solution Overview
Problem
Current methods lack a standardized way to record transaction-specific stage-wise flow information for Design Under Verification (DUV) or System Under Verification (SUV), making it difficult and time-consuming to identify the root cause of failures during data integrity checks or missing output packets.
Innovation Solution
A system and method that includes a prediction unit and a transaction specific stage-wise flow tracker to record and store log data for each data processing stage, generating a separate log file for mismatches or missing packets, allowing for efficient debugging and failure analysis.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of time
If traditional log recording methods are used, then the verification process can be completed, but the time and effort required for failure analysis becomes excessive
Solution Approach 1:
The patent segments the verification process into distinct data processing stages (e.g., stage 1, stage 2, stage 3) and records transaction-specific information for each stage separately. This segmentation allows the system to track exactly where in the processing pipeline a failure occurs, enabling rapid localization of the issue without analyzing entire log files sequentially.
Solution Approach 2:
The patent introduces a prediction unit that acts as an intermediary between the stimulus generator and the design under verification. This prediction unit generates expected output packets and compares them with actual output packets, serving as a mediator that identifies mismatches and triggers detailed stage-wise log recording only when failures occur, rather than continuously recording all transactions.
2Ease of operation
If detailed transaction-specific stage-wise log data is recorded for all transactions, then failure analysis becomes easier, but the storage requirement and data processing overhead increases significantly
Solution Approach 1:
The patent performs preliminary action by recording transaction-specific stage-wise log data only when a failure or mismatch is detected by the prediction unit. Instead of continuously recording all transactions regardless of outcome, the system prepares and stores detailed stage-wise information in advance only for failed transactions, reducing overall data volume while maintaining ease of failure analysis.
Solution Approach 2:
The patent creates a copy of the verification process within the prediction unit, which mimics the data processing stages without actually executing the full design under verification. This copy allows the system to track expected versus actual behavior separately from the main design, enabling detailed logging only where discrepancies occur without duplicating entire transaction streams.
3Measurement precision
If the system tracks every data processing stage for every transaction, then the root cause of failures can be identified accurately, but the device complexity increases
Solution Approach 1:
The patent implements a universal prediction unit that serves multiple functions: it generates expected output packets, compares them with actual output packets, detects mismatches, and triggers stage-wise logging. This multi-functional approach consolidates what would otherwise require separate complex subsystems into a single versatile component, achieving precise failure location without proportionally increasing overall system complexity.
Data Source
AI summary
The present disclosure relates to system(s) and method(s) for capturing transaction specific stage-wise log data corresponding to at least one of a Design Under Verification or System Under Verification (DUV/SUV). The system comprises a testbench and the DUV/SUV connected to the testbench. The testbench is configured to generate a set of input packets to be processed by the DUV/SUV. Further, the testbench is also configured to generate corresponding expected output packets. If an expected output packet does not match the corresponding actual output packet generated by the DUV/SUV after processing the set of input packets, or if the actual output packet is not generated by the DUV/SUV (when it is expected to), the testbench is configured to capture transaction specific stage-wise log data for the corresponding expected output packet in a separate TSSW log file.