TSV Sidewall Air Gap Reduces Parasitic Capacitance
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Solution Overview
Problem
Current through-silicon via (TSV) fabrication techniques face challenges in reducing parasitic capacitance and mechanical stress in semiconductor structures, which affect the performance and reliability of 3D integrated circuits and packages.
Innovation Solution
The proposed method involves forming air gaps at the sidewalls of TSV structures by depositing a sacrificial layer, applying a barrier layer, and using a hydrofluoric acid etchant to remove the sacrificial layer, followed by sealing with an organic dielectric layer to reduce mechanical stress and parasitic capacitance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a traditional TSV structure with direct contact between silicon substrate and conductor is used, then the structure is simple to manufacture, but parasitic capacitance and mechanical stress increase, deteriorating device performance
Solution Approach 1:
The patent introduces an air gap as an intermediary layer between the silicon substrate and the TSV conductor, separated by a barrier layer. This air gap acts as a mediator that reduces parasitic capacitance and mechanical stress while maintaining the electrical and structural integrity of the TSV structure
Solution Approach 2:
The patent segments the traditional continuous TSV structure by introducing a discontinuous air gap region around the conductor. This segmentation separates the conductor from direct contact with the silicon substrate, creating distinct functional zones that reduce harmful interactions while preserving conductivity
2Stress or pressure
If the silicon substrate and TSV conductor are in direct contact, then the manufacturing process is simpler, but mechanical stress in the silicon substrate increases
Solution Approach 1:
The air gap serves as a mechanical intermediary that decouples the stress between the silicon substrate and the TSV conductor. By introducing this void space, thermal expansion mismatches and mechanical stresses are isolated, preventing stress propagation to the substrate
Solution Approach 2:
The patent extracts the harmful mechanical and electrical interaction between the silicon substrate and TSV conductor by removing the direct contact interface. The air gap effectively takes out the problematic coupling, leaving each component to function independently without stress transfer
3Object-affected harmful factors
If the silicon substrate and TSV conductor are in direct contact, then the structure is simpler, but parasitic capacitance increases
Solution Approach 1:
The air gap acts as an electrical intermediary with low dielectric constant, positioned between the silicon substrate and TSV conductor. This intermediary layer reduces the electric field coupling and parasitic capacitance while maintaining the necessary electrical connection through the barrier layer
Solution Approach 2:
The air gap region functions as a porous or void structure surrounding the TSV conductor, utilizing the low dielectric constant of air to minimize parasitic capacitance. This porous arrangement allows electrical conduction through the barrier while reducing capacitive coupling to the substrate
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively reduces parasitic capacitance and mechanical stress, enhancing the performance and reliability of TSVs in 3D semiconductor structures by minimizing contact between the silicon substrate and the TSV conductor.
Implementation Method 1
removing the sacrificial layer with a hydrofluoric acid etchant
Implementation Method 2
A barrier layer is formed to line the opening in order to prevent a later-formed conductive material (e.g., copper) from diffusing into the substrate
Implementation Method 3
A conductive material is then electroplated (deposited) into TSV holes
Data Source
AI summary
Embodiments of the present invention provide a novel process integration for air gap formation at the sidewalls for a Through Silicon Via (TSV) structure. The sidewall air gap formation scheme for the TSV structure of disclosed embodiments reduces parasitic capacitance and depletion regions in between the substrate silicon and TSV conductor, and serves to also reduce mechanical stress in silicon substrate surrounding the TSV conductor.