Semiconductor Wafer TSV Alignment via Backside Conductive Voids
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Solution Overview
Problem
Semiconductor wafers with opaque backside surfaces or non-transparent materials hinder alignment during backside processing due to the inability to visualize frontside alignment patterns, limiting the effectiveness of alignment equipment.
Innovation Solution
A semiconductor wafer design featuring through-substrate vias (TSVs) with primary axes aligned in different directions, accompanied by a conductive layer on the backside that includes a seed metal layer and a thick metal layer, enhancing visibility of alignment patterns and allowing for optical detection through the conductive material voids aligned with circuit elements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the wafer backside is covered with an opaque material or made non-transparent, then the structural integrity and electrical functionality are improved, but alignment during backside processing becomes impossible
Solution Approach 1:
The alignment pattern is segmented into multiple discrete TSVs (trench-type vias) with different orientations rather than using a continuous opaque layer. This segmentation allows optical equipment to detect specific via orientations through the conductive layer while maintaining the overall structural integrity of the wafer backside.
Solution Approach 2:
The invention uses conductive material voids (absent regions) in the conductive layer to create optical contrast, enabling alignment patterns to be visible to optical equipment. The varying orientations of TSVs create detectable patterns through differential optical properties, allowing alignment without compromising the opaque conductive backing.
2Ease of operation
If frontside alignment patterns are used for backside processing, then alignment capability is maintained, but the process becomes complex and time-consuming
Solution Approach 1:
Instead of using frontside alignment patterns for backside alignment (which requires wafer flipping and complex procedures), the invention creates alignment patterns directly on the backside through the conductive layer. This inversion allows alignment to be performed directly on the backside without additional manipulation steps.
Solution Approach 2:
The conductive layer with TSVs serves as an intermediary structure that simultaneously provides electrical functionality and optical alignment capability. This mediator eliminates the need for separate alignment procedures by integrating alignment features into the conductive structure itself.
3Reliability
If a thick conductive layer is deposited on the backside, then electrical conductivity is improved, but visibility of alignment patterns to optical equipment is reduced
Solution Approach 1:
The conductive layer is designed with a porous or non-uniform structure containing conductive material voids that correspond to the TSV orientations. This porous structure allows optical penetration at specific orientations while maintaining overall electrical conductivity through the conductive material pathways.
Solution Approach 2:
The conductive layer exhibits local quality variations where specific regions have voids aligned with particular TSV orientations, allowing optical detection in those directions while maintaining conductivity through other pathways. This local differentiation enables simultaneous electrical functionality and optical visibility.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables accurate alignment during backside processing by making alignment patterns visible to optical equipment, improving the quality factor of circuit elements like inductors and capacitors, and facilitating efficient semiconductor device manufacturing.
Implementation Method 1
The seed metal layer may enhance visibility of edges of the plurality of first through substrate vias
Implementation Method 2
The alignment pattern may be visible to optical alignment equipment through the conductive layer
Data Source
Figure 1
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Figure 3~4
AI summary
An embodiment of a semiconductor wafer includes a semiconductor substrate, a plurality of through substrate vias (TSVs), and a conductive layer. The TSVs extend between first and second substrate surfaces. The TSVs include a first subset of trench via(s) each having a primary axis aligned in a first direction, and a second subset of trench via(s) each having a primary axis aligned in a second and different direction. The TSVs form an alignment pattern in an alignment area of the substrate. The conductive layer is directly connected to the second substrate surface and to first ends of the TSVs. Using the TSVs for alignment, the conductive layer may be patterned so that a portion of the conductive layer is directly coupled to the TSVs, and so that the conductive layer includes at least one conductive material void (e.g., in alignment with a passive component at the first substrate surface).