TSV Alignment in Semiconductor Device Production
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Solution Overview
Problem
The conventional method for producing semiconductor devices with multilayer structures is complex and costly due to the need for mirror-symmetrical layouts of TSVs and logic circuits, which complicates the redesign and manufacturing of masks and increases production costs.
Innovation Solution
A method for producing semiconductor devices with a two-layer structure where only the I/O circuit is made in a mirror-symmetrical layout, allowing for simpler production steps and improved layout freedom, while the logic circuit is maintained in a normal layout, enabling easier alignment of TSVs in a straight line and reducing production complexity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If mirror-symmetrical layout is used for both logic circuit and I/O circuit to align TSVs in straight line, then TSV alignment is improved, but device complexity and manufacturing cost increase
Solution Approach 1:
The patent divides the multilayer structure into two segments: the first layer (I/O circuit) uses mirror-symmetrical layout to ensure TSV alignment, while the second layer (logic circuit) uses normal layout. This segmentation allows each layer to be optimized independently, resolving the contradiction between alignment precision and design complexity.
Solution Approach 2:
The patent applies different layout qualities to different layers: the I/O circuit layer receives mirror-symmetrical treatment for alignment purposes, while the logic circuit layer maintains normal layout for design simplicity. This local differentiation resolves the contradiction by applying complexity only where necessary for TSV alignment.
2Manufacturing precision
If mirror-symmetrical layout is used for logic circuit, then TSV alignment is improved, but ease of manufacture deteriorates due to mask redesign
Solution Approach 1:
The patent segments the layout requirements by layer, applying mirror-symmetrical layout only to the I/O circuit layer while keeping the logic circuit layer in normal layout. This eliminates the need to redesign masks for the logic circuit, thereby improving ease of manufacture while maintaining sufficient TSV alignment through the I/O layer's mirror layout.
Solution Approach 2:
The patent applies mirror-symmetrical layout quality locally to the I/O circuit layer where TSV alignment is critical, while the logic circuit layer maintains normal layout quality for easier mask manufacturing. This localized application resolves the contradiction between alignment precision and manufacturing ease.
3Ease of manufacture
If normal layout is used for both layers, then ease of manufacture is improved, but TSV alignment deteriorates causing wiring delays
Solution Approach 1:
The patent segments the layout approach: the I/O circuit layer uses mirror-symmetrical layout to ensure TSVs are positioned in straight lines for optimal alignment, while the logic circuit layer uses normal layout for manufacturing ease. This segmentation prevents wiring delays caused by misalignment while maintaining ease of manufacture through selective application of layout strategies.
Data Source
AI summary
a method for producing a semiconductor device provided in such a manner that a first layer and a second layer are laminated to ensure that their TSVs are arranged in almost a straight line, including: first layer production steps including steps of preparing a substrate, forming a transistor of an input/output circuit on an upper surface of the substrate, forming an insulation layer so as to cover the transistor, and forming a TSV in the insulation layer; second layer production steps including steps of preparing a substrate, forming a transistor of a logic circuit on an upper surface of the substrate, forming an insulation layer so as to cover the transistor, and forming a TSV in the insulation layer; a connection step of connecting surfaces of the first layer and the second layer on a side opposite to substrates of the first layer and the second layer to ensure that the TSV of the first layer and the TSV of the second layer are arranged in almost a straight line; and a step of removing the substrate of the first layer.