TSV Alignment via Transparent Intermediary Material in 3D IC Stacks
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Solution Overview
Problem
Current bonding processes for through-silicon-via (TSV) based 3D integrated circuit (IC) stacks face challenges in precision alignment, bonding strength, electrical interconnection, and manufacturability, hindering cost-effective miniaturization and mass production.
Innovation Solution
A method involving wafers with TSVs filled with conductive and alignment materials, where alignment is achieved using transparent alignment materials and subsequent removal followed by conductive filling, enhancing bonding strength and electrical interconnection through precise alignment and bonding techniques.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If current bonding processes (Cu-Cu bonding, oxide bonding, soldering) are used for TSV based 3D IC stacks, then bonding strength can be achieved, but precision alignment and manufacturability are insufficient
Solution Approach 1:
The patent introduces an alignment material as an intermediary substance filled into TSVs before bonding. This alignment material provides precise alignment features while enabling subsequent bonding processes, resolving the contradiction between alignment precision and manufacturability by decoupling these two functions into sequential steps
Solution Approach 2:
The patent performs alignment material filling and alignment feature creation before the actual bonding process. This preliminary action ensures precise alignment is established in advance, allowing the bonding step to focus solely on creating strong mechanical and electrical connections, thereby improving both alignment precision and overall manufacturability
2Reliability
If current bonding processes are used, then bonding strength can be achieved, but electrical interconnection quality is insufficient
Solution Approach 1:
The patent segments the TSV filling process into distinct phases: first filling with alignment material for precise alignment, then after bonding, removing the alignment material and filling with conductive material for electrical interconnection. This segmentation allows each function (alignment and electrical connection) to be optimized independently while maintaining bonding strength
Solution Approach 2:
The patent changes the material parameter within TSVs from alignment material to conductive material through a sequential process. This parameter change enables the same TSV structure to serve dual purposes: first for precise alignment during bonding, then for high-quality electrical interconnection after bonding, resolving the contradiction between bonding strength and electrical interconnection quality
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method improves alignment, bonding strength, and electrical interconnection of 3D IC stacks, addressing the limitations of existing processes and enhancing manufacturability, resulting in more efficient and cost-effective production.
Implementation Method 1
filling each second TSV in the second wafer with an alignment material transparent to at least one of infrared, visible, and ultraviolet (UV) light
Implementation Method 2
filling each second TSV in the second wafer with a conductive material
Implementation Method 3
bonding the first and second wafers by forming an adhesive bonding layer on at least one surface of the first or second wafer
Data Source
AI summary
Through-silicon-via (TSV) based 3D integrated circuit (3D IC) stacks are aligned, bonded and electrically interconnected using a transparent alignment material in the TSVs until the wafers are bonded. Embodiments include providing a first wafer having a first device layer and at least one first TSV filled with a conductive material, providing a second wafer having a second device layer, forming at least one second TSV in the second wafer, filling each second TSV with an alignment material, thinning the second wafer until the transparent material extends all the way through the wafer, aligning the first and second wafers, bonding the first and second wafers, removing the alignment material from the second wafer, and filling each second TSV in the second wafer with a conductive material.