Through-Silicon Via Antenna for Compact RF Integration
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Solution Overview
Problem
Conventional on-chip Planar Inverted F Antennas (PIFAs) occupy large areas and have performance issues compared to Printed Circuit Board (PCB) antennas, particularly due to substrate-induced signal trapping and limited frequency range from 1 GHz to 30 GHz.
Innovation Solution
A compact Planar Inverted F Antenna (PIFA) design utilizing a silicon substrate with through-silicon vias (TSVs) for RF signal transmission, featuring a conductive top plate and ground plate with optimized placement and shape to reduce parasitic elements and enhance radiation efficiency, allowing for half-wavelength and quarter-wavelength radiation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If a conventional on-chip PIFA is designed, then it can transmit RF signals, but it occupies a relatively large area
Solution Approach 1:
The patent transitions from a planar 2D antenna design to a 3D vertical structure by implementing the antenna in multiple metal layers (first metal layer, second metal layer, third metal layer) connected through vertical vias. This dimensional change allows the antenna to achieve the required electrical length and radiation performance in a smaller footprint area on the substrate.
Solution Approach 2:
The antenna structure embeds multiple functional elements within each other: the feed line is formed in the first metal layer, the radiating element in the second metal layer, and the ground connection in the third metal layer, with vias nesting through the substrate to connect these layers. This nested configuration maximizes space utilization and achieves compact integration.
2Ease of manufacture
If a conventional on-chip PIFA is designed, then it can be integrated on chip, but it has performance issues compared to PCB antennas
Solution Approach 1:
The patent modifies key electrical parameters by changing the dielectric constant of the substrate material and adjusting the dimensions of the antenna elements across different layers. By optimizing the height of each layer, the via dimensions, and the metal trace widths, the antenna achieves improved impedance matching and radiation efficiency suitable for on-chip integration while maintaining performance.
Solution Approach 2:
The antenna structure employs a composite construction with multiple metal layers separated by dielectric materials, combined with through-substrate vias filled with conductive material. This composite approach leverages the advantages of different materials and structures to achieve both on-chip manufacturability and enhanced performance compared to single-layer planar designs.
3Ease of manufacture
If a substrate with high dielectric constant is used, then on-chip integration is achieved, but microwave signals are trapped
Solution Approach 1:
The patent divides the antenna structure into multiple segmented layers with different functions: feed line layer, radiating element layer, and ground layer. The through-substrate vias segment the electrical path vertically, allowing signals to transition between layers and escape the high-dielectric substrate environment, thereby reducing signal trapping while maintaining integration benefits.
Solution Approach 2:
The dielectric layers between metal layers and the via structures act as intermediaries that manage the interaction between the RF signals and the high-dielectric substrate. These intermediary elements guide the electromagnetic fields in controlled paths that minimize substrate trapping effects while maintaining the integrated on-chip structure.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The compact PIFA design achieves better return loss performance and smaller size compared to conventional PIFAs, enabling efficient RF signal transmission and reception across a broader frequency range, including mm-wave regions, while integrating seamlessly with CMOS processes and 3D packaging.
Implementation Method 1
A feed line is connected to the top plate, and the feed line comprises a first through-silicon via (TSV) structure passing through the substrate
Implementation Method 2
allowing for half-wavelength and quarter-wavelength radiation
Data Source
AI summary
An antenna includes a substrate and a conductive top plate over the substrate. A feed line is connected to the top plate, and the feed line comprises a first through-silicon via (TSV) structure passing through the substrate. The feed line is arranged to carry a radio frequency signal. A method of designing an antenna includes selecting a shape of a top plate, determining a size of the top plate based on an intended signal frequency, and determining, based on the shape of the top plate, a location of each TSV of at least one TSV contacting the top plate. A method of implementing an antenna includes forming a first feed line through a substrate, the first feed line comprising a TSV, and forming a top plate over the substrate, the top plate being electrically conductive and connected to the first feed line.