Through-Silicon Via Bump Pad Testing via Switch Units

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Solution Overview

Problem

The existing integrated circuit packaging technology faces challenges in testing the electrical coupling states of small-sized bump pads and through-silicon vias, as they are too small to be probed by conventional test equipment, necessitating separate probe pads for testing.

Innovation Solution

The integrated circuit design includes semiconductor devices with through-silicon vias and switch units that allow for electrical coupling and decoupling of bump pads and probe pads, enabling the testing of electrical coupling states between bump pads and through-silicon vias using test enable signals, without the need for separate probe pads.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If bump pads are designed with small size (several tens of micrometers) for high speed operation and high integration, then integration density and operating speed are improved, but the bump pads become too small to be probed by conventional test equipment

Engineering Contradiction:
Improveintegration densityVSAvoidtestability
Core Design Contradiction:
ProductivityVSDifficulty of detecting and measuring

Solution Approach 1:

The invention divides the testing function into two parts: small bump pads for signal transmission and large probe pads for testing. The probe pads are electrically coupled to the bump pads through conductive structures (through-silicon vias), allowing test equipment to access the small bump pads indirectly through the larger probe pads, thus resolving the contradiction between small size and testability

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The probe pads serve as an intermediary element between the test equipment and the small bump pads. By introducing this intermediate structure with larger dimensions, the test equipment can probe the electrical characteristics of the small bump pads without requiring direct contact with the tiny bump pad surfaces

Inventive Principle:
Principle #24Intermediary (Mediator)

2Difficulty of detecting and measuring

If separate probe pads are formed for testing, then testability is improved, but device structure and manufacturing process become more complex

Engineering Contradiction:
ImprovetestabilityVSAvoidstructure complexity
Core Design Contradiction:
Difficulty of detecting and measuringVSDevice complexity

Solution Approach 1:

The invention merges the probe pads and bump pads into a unified electrical connection system. The probe pads are electrically coupled to the bump pads through shared conductive structures (through-silicon vias), combining the testing function with the existing signal transmission path rather than creating entirely separate test structures

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The conductive structures (through-silicon vias) serve multiple functions: they provide electrical connection for both signal transmission between bump pads and serve as test paths from probe pads to bump pads. This multi-functionality reduces the need for separate dedicated test structures, simplifying the overall device architecture

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This design allows for effective testing of electrical coupling states between bump pads and through-silicon vias, ensuring proper operation and identifying any issues in the electrical connections within the stacked semiconductor devices.

Implementation Method 1

a first through-silicon via configured for electrically coupling a first bump pad to a second bump pad

Methodology Applied
Scientific EffectElectrical conduction: Conduction (electrical)

Implementation Method 2

configured to buffer a first internal test signal generated by a test signal inputted through the first bump pad and configured to generate a first detection signal

Methodology Applied
Scientific EffectElectrical signal buffering:

Data Source

PatentUS9841460B2Integrated circuit
Publication Date: 2017.12.12 SK HYNIX INC
  • US9841460B2 patent drawing
  • US9841460B2 patent drawing
  • US9841460B2 patent drawing

AI summary

An integrated circuit may include a first semiconductor device including a first through-silicon via configured for electrically coupling a first bump pad to a second bump pad, and may be configured to buffer a first internal test signal generated by a test signal inputted through the first bump pad and generate a first detection signal. The integrated circuit may include a second semiconductor device including a second through-silicon via configured for electrically coupling a third bump pad to a fourth bump pad, and may be configured to buffer a second internal test signal generated by the test signal inputted through the third bump pad and generate a second detection signal. The third bump pad may be electrically coupled with the second bump pad.