Through Silicon Via Chip Stress Sensor Integration
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Solution Overview
Problem
Current techniques for integrating multiple chips into a single package structure face challenges in efficiently measuring thermal stress/strain caused by thermal expansion coefficient differences and mechanical stress, which complicates design and process improvements in heterogeneous integration.
Innovation Solution
A measuring apparatus comprising a chip with through silicon vias, a heater, and stress sensors that simulate various temperatures to measure thermal resistances and stress/strain values, allowing for real-time monitoring and analysis of stress distribution in three-dimensional stacked chip structures.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If multiple chips are stacked through bump bonding to achieve three-dimensional integration, then the integration density and functionality are improved, but the structural complexity and difficulty of measuring thermal stress/strain increase
Solution Approach 1:
The patent segments the measurement function by placing independent stress sensors on individual chips within the stacked structure. Each chip can have its own sensors that independently measure local stress/strain conditions, allowing the complex multi-chip structure to be measured through simple, modular sensing elements rather than requiring a complex overall measurement system.
Solution Approach 2:
The patent introduces stress sensors as intermediary elements that mediate between the complex thermal/mechanical environment of the stacked chips and the measurement system. These sensors act as intermediaries that convert complex multi-axis stress states into measurable electrical signals, simplifying the measurement of thermal stress/strain in the three-dimensional structure.
2Measurement precision
If stress sensors are added to measure thermal stress/strain in stacked chips, then measurement capability is improved, but device complexity and manufacturing cost increase
Solution Approach 1:
The patent merges the stress sensing function with the existing chip structure by integrating sensors directly onto the chips during the stacking process. The sensors are combined with the bump bonding structure and chip interconnections, creating a unified measurement system that leverages existing manufacturing processes rather than adding separate, complex measurement apparatus.
Solution Approach 2:
The stress sensors implemented in the patent are designed to measure multiple components of the stress tensor (multi-axis measurement), providing universal measurement capability for different types of stress/strain conditions. A single sensor implementation can capture thermal stress, mechanical stress, and their combinations, eliminating the need for multiple specialized sensors.
3Productivity
If real-time stress/strain measurement is implemented in stacked chips, then design and process improvement speed is improved, but manufacturing complexity increases
Solution Approach 1:
The patent implements stress sensors during the chip stacking process itself, before the final product is completed. By incorporating measurement capabilities at the manufacturing stage, stress/strain data is obtained preliminarily during production, enabling real-time monitoring and immediate feedback for design and process improvements without requiring separate post-manufacturing measurement steps.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables accurate measurement of stress/strain in three-dimensional directions, facilitating design enhancements and process improvements by providing real-time thermal resistance and stress data, thus improving competitiveness in system integration.
Implementation Method 1
The first heater is disposed on the first surface and is electrically connected to the first circuit layer
Implementation Method 2
The first stress sensor is disposed on the first surface and is electrically connected to the first circuit layer
Data Source
AI summary
A measuring apparatus including a first chip, a first circuit layer, a first heater, a first stress sensor and a second circuit layer is provided. The first chip has a first through silicon via, a first surface and a second surface opposite to the first surface. The first circuit layer is disposed on the first surface. The first heater and the first stress sensor are disposed on the first surface and connected to the first circuit layer. The second circuit layer is disposed on the second surface.