TSV Contact Pad Insulation via Interlayer Dielectric Layer

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Highly integrated semiconductor devices experience leakage current due to through silicon via contacts, which affects the reliability of the devices.

Innovation Solution

The implementation of a semiconductor device design that includes a substrate with a device isolation layer and an interlayer dielectric layer, where the conductive via is confined within the interlayer dielectric and device isolation layers, preventing direct contact with the substrate and thus eliminating the leakage current path.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If through silicon via contacts are formed to augment wire bonding techniques, then packaging capacity and integration are improved, but leakage current occurs between the through silicon via contacts and substrate

Engineering Contradiction:
Improvepackaging capacityVSAvoidleakage current
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

An isolation dielectric layer is introduced as an intermediary between the through-silicon via contact pad and the substrate. This mediator prevents direct electrical contact, thereby eliminating the leakage current path while maintaining the structural integrity and functionality of the TSV connection. The isolation dielectric layer acts as a barrier that blocks unwanted current flow without interfering with the intended signal or power transmission through the via.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If the conductive via contact pad is confined within the interlayer dielectric and device isolation layers, then leakage current is eliminated, but device complexity increases

Engineering Contradiction:
Improveelectrical reliabilityVSAvoidstructural complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The device structure is segmented into distinct functional layers: the substrate, device isolation layer, interlayer dielectric layer, and conductive via contact pad. By dividing the structure into these separate segments, each layer can be optimized for its specific function. The isolation layers are positioned to specifically address the leakage current issue without requiring redesign of the entire device, thus managing complexity through modular segmentation.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The isolation dielectric layers serve as intermediaries that simplify the overall design by providing a straightforward solution to the leakage current problem. Rather than attempting to modify the conductive via or substrate directly, the intermediary layers provide a clean separation that eliminates the harmful electrical interaction while maintaining the intended functionality.

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This design enhances the electrical reliability of the semiconductor device by eliminating the leakage current between through silicon via pads and the substrate, improving the overall performance and stability of the device.

Implementation Method 1

the conductive via contact pad is confined within an area of the interlayer dielectric layer and/or an area of the device isolation layer that electrically insulates the conductive via contact pad from the substrate

Methodology Applied
Scientific EffectElectrical insulation: Dielectric

Data Source

PatentUS8890282B2Integrated circuit devices including through-silicon via (TSV) contact pads electronically insulated from a substrate
Publication Date: 2014.11.18 SAMSUNG ELECTRONICS CO LTD
  • US8890282B2 patent drawing
  • US8890282B2 patent drawing
  • US8890282B2 patent drawing

AI summary

An integrated circuit device includes a substrate having a plurality of device patterns thereon. A device isolation layer is provided on the substrate, an interlayer dielectric layer is provided on the device isolation layer and the substrate, and a conductive via extends through the interlayer dielectric layer and the device isolation layer and into the substrate. A conductive via contact pad is provided on the interlayer dielectric layer in electrical contact with the conductive via. In plan view, the conductive via contact pad is confined within an area of the interlayer dielectric layer and/or an area of the device isolation layer that electrically insulates the conductive via contact pad from the substrate. Related methods and devices are also discussed.